EPM9560RI304-15 vs EPM9560RC304-10 Comparison
Detailed side-by-side comparison of EPM9560RI304-15 by Intel and EPM9560RC304-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RI304-15
EPM9560RI304-15 - 560-Macrocell MAX 9000 CPLD | Intel/Altera | 15ns
EPM9560RI304-15 NrndIntel
EPM9560RC304-10
EPM9560RC304-10 - MAX 9000 CPLD, 560 Logic Elements | Intel
EPM9560RC304-10 NrndSpecification Comparison
| Parameter | EPM9560RI304-15 | EPM9560RC304-10 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $112.00 | $17.60 |
| Device Family | MAX 9000 | β |
| Architecture | Multiple Array MatriX (MAX) - EEPROM-based CPLD | β |
| Macrocells | 560 | 560 |
| Flip-Flops | 772 | β |
| User I/Os | 212 (216 per some datasheets) | β |
| Dedicated Inputs | 4 | β |
| Total Terminals | 304 | β |
| Package Code | HFQFP / S-PQFP-G304 | β |
| Package Type | 304-pin RQFP (Quad Flat Pack, gull-wing) | β |
| Propagation Delay (tpd) | 11.4 ns (per digchip datasheet); 16.6 ns reported by MicrochipUSA | β |
| Maximum Internal Frequency | 145 MHz | β |
| Speed Grade | -15 | -10 |
| Supply Voltage (VCCINT/VCCIO) | 4.5 V to 5.5 V (5 V typical) | β |
| I/O Logic Levels | 3.3 V or 5 V configurable | β |
| Operating Temperature | 0 C to 70 C (commercial) | [DATA_NEEDED: operating temperature range] |
| Temperature Grade | Industrial (per Partstack listings) | β |
| Logic Family | CMOS | β |
| Programming | 5.0-V in-system programmable via JTAG (IEEE 1149.1) | β |
| Process Technology | 0.5 Β΅m CMOS EEPROM | 0.65 Β΅m CMOS EEPROM |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | ROHS3 Compliant |
| Family | β | MAX 9000 |
| Device Type | β | CPLD / EPLD |
| Usable Gates | β | 16000 |
| Logic Elements | β | 560 |
| Package | β | RQFP-304 (RC) |
| Pin Count | β | 304 |
| Pin-to-Pin Propagation Delay | β | 12 ns |
| Supply Voltage | β | 5 V |
| User I/O Pins | β | 304 (package-limited) |
| JTAG / Boundary Scan | β | IEEE 1149.1 compliant |
| Programming Method | β | JTAG in-system (ISP) |
| MSL Level | β | 3 (168 Hours) |