EPM9560RI304-15 vs EPM9560RC304-15C Comparison
Detailed side-by-side comparison of EPM9560RI304-15 by Intel and EPM9560RC304-15C by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RI304-15
EPM9560RI304-15 - 560-Macrocell MAX 9000 CPLD | Intel/Altera | 15ns
EPM9560RI304-15 NrndAltera
EPM9560RC304-15C
EPM9560RC304-15C - 560 Macro Cell MAX 9000 CPLD 117.6MHz 5V | Altera
EPM9560RC304-15C ObsoleteSpecification Comparison
| Parameter | EPM9560RI304-15 | EPM9560RC304-15C |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $112.00 | $24.50 |
| Device Family | MAX 9000 | β |
| Architecture | Multiple Array MatriX (MAX) - EEPROM-based CPLD | Multiple Array MatriX (MAX), 3rd generation |
| Macrocells | 560 | β |
| Flip-Flops | 772 | β |
| User I/Os | 212 (216 per some datasheets) | β |
| Dedicated Inputs | 4 | β |
| Total Terminals | 304 | β |
| Package Code | HFQFP / S-PQFP-G304 | β |
| Package Type | 304-pin RQFP (Quad Flat Pack, gull-wing) | β |
| Propagation Delay (tpd) | 11.4 ns (per digchip datasheet); 16.6 ns reported by MicrochipUSA | β |
| Maximum Internal Frequency | 145 MHz | β |
| Speed Grade | -15 | β |
| Supply Voltage (VCCINT/VCCIO) | 4.5 V to 5.5 V (5 V typical) | β |
| I/O Logic Levels | 3.3 V or 5 V configurable | β |
| Operating Temperature | 0 C to 70 C (commercial) | 0 C to +70 C (Commercial) |
| Temperature Grade | Industrial (per Partstack listings) | β |
| Logic Family | CMOS | β |
| Programming | 5.0-V in-system programmable via JTAG (IEEE 1149.1) | β |
| Process Technology | 0.5 Β΅m CMOS EEPROM | CMOS EEPROM |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Family | β | MAX 9000 |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Usable Gates | β | 12,000 |
| Macro Cells | β | 560 |
| Logic Array Blocks (LABs) | β | 16 |
| User I/O Pins (maximum) | β | 212 |
| Maximum Operating Frequency | β | 117.6 MHz |
| Pin-to-Pin Propagation Delay (tPD) | β | 15 ns |
| Supply Voltage | β | 5.0 V |
| In-System Programmability | β | Yes (IEEE 1149.1 JTAG) |
| Program/Erase Endurance | β | 100 cycles minimum |
| Package | β | 304-pin RQFP |