EPM9560RI304-15 vs EPM9560RI304-20 Comparison
Detailed side-by-side comparison of EPM9560RI304-15 by Intel and EPM9560RI304-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RI304-20 - 560 Macrocell MAX 9000 CPLD, 20ns, RQFP-304 | Intel
EPM9560RI304-20 ObsoleteSpecification Comparison
| Parameter | EPM9560RI304-15 | EPM9560RI304-20 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $112.00 | $18.50 |
| Device Family | MAX 9000 | MAX 9000 |
| Architecture | Multiple Array MatriX (MAX) - EEPROM-based CPLD | Multiple Array MatriX (MAX) - 3rd generation |
| Macrocells | 560 | β |
| Flip-Flops | 772 | β |
| User I/Os | 212 (216 per some datasheets) | β |
| Dedicated Inputs | 4 | β |
| Total Terminals | 304 | β |
| Package Code | HFQFP / S-PQFP-G304 | β |
| Package Type | 304-pin RQFP (Quad Flat Pack, gull-wing) | β |
| Propagation Delay (tpd) | 11.4 ns (per digchip datasheet); 16.6 ns reported by MicrochipUSA | β |
| Maximum Internal Frequency | 145 MHz | β |
| Speed Grade | -15 | β |
| Supply Voltage (VCCINT/VCCIO) | 4.5 V to 5.5 V (5 V typical) | β |
| I/O Logic Levels | 3.3 V or 5 V configurable | β |
| Operating Temperature | 0 C to 70 C (commercial) | [DATA_NEEDED: industrial/commercial range] |
| Temperature Grade | Industrial (per Partstack listings) | β |
| Logic Family | CMOS | β |
| Programming | 5.0-V in-system programmable via JTAG (IEEE 1149.1) | β |
| Process Technology | 0.5 Β΅m CMOS EEPROM | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: lead-free / RoHS variant] |
| Macrocell Count | β | 560 |
| Logic Array Blocks (LABs) | β | 16 (max) |
| Pin-to-Pin Delay (tPD) | β | 20 ns |
| Maximum User I/O Pins | β | 212 |
| Supply Voltage (VCC) | β | 5.0 V |
| Programmable Technology | β | CMOS EEPROM |
| In-System Programmability | β | Yes, via JTAG (IEEE 1149.1) |
| Boundary Scan | β | IEEE Std. 1149.1 JTAG |
| Package | β | 304-pin RQFP (Plastic Quad Flat Pack) |
| Reprogram Cycles | β | 100+ (EEPROM) |