EPM9560SRC240-15 vs EPM9560RI240-15N Comparison
Detailed side-by-side comparison of EPM9560SRC240-15 by Altera and EPM9560RI240-15N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560SRC240-15
EPM9560SRC240-15 - MAX 9000 CPLD, 560 Gates, 240-Pin | Intel / Altera
EPM9560SRC240-15 NrndIntel
EPM9560RI240-15N
EPM9560RI240-15N - MAX 9000 CPLD 560 Macrocell | Intel
EPM9560RI240-15N ObsoleteSpecification Comparison
| Parameter | EPM9560SRC240-15 | EPM9560RI240-15N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $22.50 | $0.00 |
| Family | MAX 9000 | β |
| Device Type | EPLD / CPLD (Complex Programmable Logic Device) | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Usable Gates | 560 | 12,000 |
| Logic Array Blocks (LABs) | 16 | β |
| Macrocells | 212 | 560 |
| Maximum User I/O Pins | [DATA_NEEDED: exact I/O count for SRC240 package] | β |
| Speed Grade | -15 (15 ns tPD) | β |
| Pin-to-Pin Logic Delay (tPD) | 15 ns (max) | β |
| Supply Voltage (VCC) | 5 V (nominal) | β |
| Programmability | In-system programmable via IEEE 1149.1 JTAG | β |
| Non-volatile | Yes (EPROM/EEPROM cells) | β |
| Package | RQFP-240 (Surface Mount) | 240-pin RQFP (PowerQuad Flat Pack) |
| Operating Temperature | [DATA_NEEDED: commercial 0-70C or industrial -40-85C] | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS compliance not stated in provided data] | RoHS3 Compliant |
| Process Technology | CMOS EPROM | β |
| Logic Family | β | MAX 9000 (Multiple Array MatriX) |
| Flip-Flops | β | 772 |
| User I/O Pins | β | 216 |
| Pin-to-Pin Propagation Delay | β | 15 ns |
| Internal Frequency | β | 145 MHz |
| Supply Voltage | β | 5.0 V |
| I/O Voltage Compatibility | β | 3.3 V or 5.0 V configurable |
| Configuration Memory | β | EEPROM (non-volatile, in-system programmable) |
| JTAG Interface | β | IEEE 1149.1 (JTAG) boundary scan |
| Operating Temperature Range | β | -40 C to +85 C (industrial) |
| Moisture Sensitivity Level | β | MSL 3 (168 hours) |
| Manufacturer Standard Lead Time | β | 1-7 days (distributor stock) |