EPM9560WC208-20C vs EPM9560RC208-20C Comparison

Detailed side-by-side comparison of EPM9560WC208-20C by Altera and EPM9560RC208-20C by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560WC208-20C EPM9560RC208-20C
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $140.00 $0.00
Device Family MAX 9000 (EE PLD) β€”
Series EPM9560 β€”
Macrocells 560 560
Logic Array Blocks (LABs) 35 β€”
User I/O Pins 149 β€”
Propagation Delay (tPD) 20 ns 20 ns (speed grade -20)
Maximum Clock Frequency [DATA_NEEDED: fMAX value not in verified data] β€”
Process Technology CMOS, Electrically Erasable β€”
Supply Voltage 3.3 V or 5 V (configurable I/O) 5.0 V
Package 208-pin CQFP (Ceramic Quad Flat Pack) 208-pin RQFP (Power Quad Flat Pack)
Pin Count 208 β€”
Programming Interface JTAG BST (in-system programmable) β€”
Operating Temperature Grade Commercial (C suffix) Commercial (0C to +70C)
Mounting Type Surface Mount (Ceramic QFP) Surface Mount
RoHS Status ROHS3 Compliant (per fpgalink listing) [DATA_NEEDED: RoHS status]
Moisture Sensitivity Level MSL 3 (168 Hours) β€”
Family β€” MAX 9000
Device Type β€” EEPROM-based CPLD (EE PLD)
Usable Gates β€” 12,000
Flip-Flops β€” 772
Configurable I/O Lines β€” 149
Maximum Frequency β€” 100 MHz
I/O Voltage Support β€” 3.3 V or 5 V
Configuration Memory β€” EEPROM (non-volatile)
In-System Programmability β€” Yes, via IEEE Std. 1149.1 JTAG
JESD-30 Package Code β€” S-PQFP-G208
Terminal Form β€” Gull Wing
Technology β€” CMOS

Datasheets & Resources

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