EPM9560WC208-20C vs EPM9560WC208-15C Comparison
Detailed side-by-side comparison of EPM9560WC208-20C by Altera and EPM9560WC208-15C by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560WC208-20C
EPM9560WC208-20C - 560-Macrocell EE PLD, 20ns, CQFP-208 | Altera
EPM9560WC208-20C ObsoleteAltera
EPM9560WC208-15C
EPM9560WC208-15C - 560-Macrocell EE PLD | Altera MAX 9000
EPM9560WC208-15C NrndSpecification Comparison
| Parameter | EPM9560WC208-20C | EPM9560WC208-15C |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $140.00 | $178.00 |
| Device Family | MAX 9000 (EE PLD) | MAX 9000 |
| Series | EPM9560 | EPM9560 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | 35 |
| User I/O Pins | 149 | 149 |
| Propagation Delay (tPD) | 20 ns | β |
| Maximum Clock Frequency | [DATA_NEEDED: fMAX value not in verified data] | 117.6 MHz |
| Process Technology | CMOS, Electrically Erasable | 0.35 Β΅m CMOS EEPROM |
| Supply Voltage | 3.3 V or 5 V (configurable I/O) | 3.3 V or 5 V |
| Package | 208-pin CQFP (Ceramic Quad Flat Pack) | CQFP-208 (Ceramic Quad Flat Pack) |
| Pin Count | 208 | β |
| Programming Interface | JTAG BST (in-system programmable) | IEEE 1149.1 JTAG |
| Operating Temperature Grade | Commercial (C suffix) | C (Commercial) |
| Mounting Type | Surface Mount (Ceramic QFP) | Surface Mount |
| RoHS Status | ROHS3 Compliant (per fpgalink listing) | ROHS3 Compliant |
| Moisture Sensitivity Level | MSL 3 (168 Hours) | β |
| Flip-Flops | β | 772 |
| Pin-to-Pin Propagation Delay (tPD) | β | 16.6 ns |
| Terminal Pitch | β | 0.50 mm |
| MultiVolt I/O | β | Yes (3.3 V / 5 V tolerant) |
| Moisture Sensitivity Level (MSL) | β | 3 (168 Hours) |