XC3090L-100PC84C vs XC3090L-8PCG84C Comparison
Detailed side-by-side comparison of XC3090L-100PC84C by Xilinx and XC3090L-8PCG84C by Xilinx. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Xilinx
XC3090L-100PC84C
XC3090L-100PC84C - XC3000 FPGA 6K Gates 100MHz PLCC-84 | Xilinx
XC3090L-100PC84C NrndXilinx
XC3090L-8PCG84C
XC3090L-8PCG84C - 84-Pin PLCC FPGA | Xilinx XC3000 Family
XC3090L-8PCG84C β Last Time BuySpecification Comparison
| Parameter | XC3090L-100PC84C | XC3090L-8PCG84C |
|---|---|---|
| Brand | Xilinx | Xilinx |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $15.20 | $26.10 |
| Family | XC3000 | XC3000A/L Series FPGA |
| Series | XC3090L (Low Power) | β |
| Logic Cells / CLBs | 320 Configurable Logic Blocks | 70 Configurable Logic Blocks |
| Gate Count (typical) | 5,000 to 6,000 gates | β |
| Maximum Operating Frequency | 100 MHz | β |
| Speed Grade | -100 | -8 (moderate) |
| Process Technology | CMOS, 5 micron | [DATA_NEEDED: process node] |
| Supply Voltage | 5 V | β |
| Package | 84-pin PLCC (PC84) | 84-pin PLCC (J-Lead, PCG84) |
| Package Code | PC84C | β |
| Mounting Type | Through-Hole / Socket (PLCC) | Surface Mount (PLCC J-Lead) |
| Operating Temperature | Commercial (0C to +70C) | 0 C to +70 C (commercial 'C' suffix) |
| Boundary Scan | IEEE 1149.1 (JTAG) | β |
| Configuration Method | Xilinx XACT bitstream | β |
| RoHS Status | [DATA_NEEDED: rohs_status] | unknown |
| MSL Level | [DATA_NEEDED: msl_level] | [DATA_NEEDED: MSL rating] |
| Lead Free | [DATA_NEEDED: lead_free] | β |
| Gate Count | β | 6,400 gates (typical) |
| Configuration Program Store | β | 64,160 bits |
| User I/O Pins | β | 70 (maximum) |
| Supply Voltage (VCC) | β | 3.0 V to 3.6 V (low-voltage 'L' variant) |
| Configuration Modes | β | Serial master/slave, parallel master/slave, peripheral mode |
| JTAG / Boundary Scan | β | IEEE 1149.1 compliant |
| Configuration Clock Range | β | [DATA_NEEDED: CCLK frequency range] |
| Lead-Free | β | unknown |
| Programming Technology | β | SRAM-based, in-system reconfigurable |