XC3090L-8PCG84C vs XC3090L-8PCG84I Comparison
Detailed side-by-side comparison of XC3090L-8PCG84C by Xilinx and XC3090L-8PCG84I by Xilinx. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Xilinx
XC3090L-8PCG84C
XC3090L-8PCG84C - 84-Pin PLCC FPGA | Xilinx XC3000 Family
XC3090L-8PCG84C β Last Time BuyXilinx
XC3090L-8PCG84I
XC3090L-8PCG84I - XC3000L FPGA 6K Gates 84-PLCC | Xilinx
XC3090L-8PCG84I ObsoleteSpecification Comparison
| Parameter | XC3090L-8PCG84C | XC3090L-8PCG84I |
|---|---|---|
| Brand | Xilinx | Xilinx |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $26.10 | $61.75 |
| Family | XC3000A/L Series FPGA | XC3000L Low-Voltage Field Programmable Gate Array |
| Logic Cells / CLBs | 70 Configurable Logic Blocks | β |
| Gate Count | 6,400 gates (typical) | β |
| Configuration Program Store | 64,160 bits | β |
| User I/O Pins | 70 (maximum) | 70 |
| Package | 84-pin PLCC (J-Lead, PCG84) | 84-pin PLCC (PCG84) |
| Supply Voltage (VCC) | 3.0 V to 3.6 V (low-voltage 'L' variant) | β |
| Speed Grade | -8 (moderate) | -8 |
| Operating Temperature | 0 C to +70 C (commercial 'C' suffix) | -40 Β°C to +85 Β°C (Industrial) |
| Configuration Modes | Serial master/slave, parallel master/slave, peripheral mode | β |
| Process Technology | [DATA_NEEDED: process node] | CMOS SRAM-based FPGA |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | β |
| Configuration Clock Range | [DATA_NEEDED: CCLK frequency range] | β |
| Mounting Type | Surface Mount (PLCC J-Lead) | Through-Hole (PLCC socket) |
| RoHS Status | unknown | [DATA_NEEDED: rohs compliance for legacy PLCC variant] |
| Lead-Free | unknown | [DATA_NEEDED: lead-free status for PCG84 PLCC package] |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| Programming Technology | SRAM-based, in-system reconfigurable | β |
| Usable Gates | β | 6,000 |
| Configurable Logic Blocks (CLBs) | β | 320 |
| Supply Voltage | β | 3.3 V |
| Maximum Toggle Frequency | β | 80 MHz |
| Configuration Memory | β | SRAM (volatile, reload required at power-up) |
| I/O Standards | β | TTL, CMOS |
| Development Tool | β | XACT (Xilinx Classic), XC3000 design flow |
| Programmable Elements | β | IOBs, CLBs, Programmable Interconnect |
| Boundary Scan | β | Yes (per XC3000 family) |