EP1M120F484I6M vs EP1M120F484C8 Comparison
Detailed side-by-side comparison of EP1M120F484I6M by Altera and EP1M120F484C8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP1M120F484I6M
EP1M120F484I6M - Mercury FPGA, 120K LE, 484-FCBGA | Altera
EP1M120F484I6M NrndSpecification Comparison
| Parameter | EP1M120F484I6M | EP1M120F484C8 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $325.00 | $105.00 |
| Family | Mercury (EP1M) | β |
| Logic Elements | 120,000 | 120 |
| System Gates | 480,000 (typical) | β |
| LABs / CLBs | 303 | β |
| Flip-Flops | 49,152 | β |
| Embedded Memory (Bits) | 4,800 Kb (480 Kbits) | β |
| Package Type | 484-Ball FCBGA | β |
| Package Code | BGA, 484 balls, Fine-pitch | β |
| Package Shape | Square | β |
| Terminal Form | Ball | β |
| Temperature Grade | Industrial | β |
| Speed Grade | -6 (slowest Mercury timing bin) | C8 (~8 ns pin-to-pin) |
| Supply Voltage | 1.5 V core / 3.3 V aux (per Mercury datasheet) | β |
| I/O Standards | LVTTL, LVCMOS, SSTL, HSTL, LVDS | β |
| Clock Management | PLLs (per Mercury family) | β |
| Boundary-Scan | IEEE 1149.1 / JTAG | β |
| RoHS Status | Compliant (M revision) | [DATA_NEEDED: RoHS compliance status] |
| Series | β | Mercury (EP1M) |
| Device Type | β | Programmable Logic Device (PLD) |
| User I/O Pins | β | 303 |
| Package | β | 484-ball FineLine BGA (F484) |
| Terminal Pitch | β | 1.00 mm |
| Seated Height | β | 2.10 mm |
| Supply Voltage (Nominal) | β | 1.8 V |
| Supply Voltage (Max) | β | 1.89 V |
| Supply Voltage (Min) | β | 1.71 V |
| Operating Temperature | β | 0C to 85C (commercial) |
| Process Technology | β | CMOS |
| Mounting Type | β | Surface Mount |