EP1M350B780C6 vs EP1M350F780-C7 Comparison
Detailed side-by-side comparison of EP1M350B780C6 by Altera and EP1M350F780-C7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP1M350F780-C7
EP1M350F780-C7 - Mercury 1440-LAB FPGA, 486 I/O, 1.25Gbps CDR BGA-780
EP1M350F780-C7 ObsoleteSpecification Comparison
| Parameter | EP1M350B780C6 | EP1M350F780-C7 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $125.00 | $92.00 |
| Manufacturer | Altera Corporation (now Intel FPGA) | β |
| Family | Mercury PLD | Mercury |
| Device Type | FPGA (Field Programmable Gate Array) | β |
| Typical Gate Count | 350,000 gates | β |
| Logic Elements | [DATA_NEEDED: logic element count] | β |
| Embedded Memory (EAB) | [DATA_NEEDED: EAB count and total RAM bits] | β |
| Phase-Locked Loops (PLLs) | [DATA_NEEDED: PLL count] | β |
| Package | 780-pin FineLine BGA | BGA-780 (FineLine) |
| User I/O Pins (approx.) | 488 | β |
| Speed Grade | -6 | -7 (commercial) |
| Operating Temperature | Commercial (0 C to +85 C) [DATA_NEEDED: explicit Tj range] | 0C to +85C (commercial) |
| Supply Voltage (Core) | [DATA_NEEDED: VCCINT] | 1.8 V |
| Supply Voltage (I/O) | [DATA_NEEDED: VCCIO] | β |
| I/O Standards | LVTTL, LVCMOS, LVDS (per family datasheet) | β |
| Embedded Transceivers | High-speed serial transceivers (Mercury family feature) | β |
| Peak Reflow Temperature | 220 C (per distributor records) | β |
| Mounting Type | Surface Mount (BGA) | β |
| MSL Level | [DATA_NEEDED: MSL rating] | β |
| RoHS Status | [DATA_NEEDED: lead-free / RoHS classification] | unknown |
| Programming Interface | JTAG (IEEE 1149.1) + Altera passive serial/AS modes | β |
| Tool Flow | Quartus II / MAX+PLUS II (Altera legacy) | β |
| Datasheet File Size | 869 Kbytes (per Alldatasheet index) | β |
| Datasheet Page Count | 86 pages (per Alldatasheet index) | β |
| Logic Family | β | CMOS (SRAM-based) |
| Logic Array Blocks (LABs) | β | 1440 |
| User I/Os | β | 486 |
| High-Speed Transceiver Channels | β | 18 (8 up to 1.25 Gbps, 10 up to 1.0 Gbps) |
| Max CDR Data Rate | β | 1.25 Gbps |
| Pin Count | β | 780 |
| Package Form | β | Surface Mount, Ball Grid Array |
| Configuration Memory | β | SRAM (volatile, requires external config device) |
| Lifecycle Status | β | Obsolete (Mercury family EOL) |