EP1M350F780C6 vs EP1M350F780C8 Comparison
Detailed side-by-side comparison of EP1M350F780C6 by Intel and EP1M350F780C8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP1M350F780C6
EP1M350F780C6 - Mercury FPGA 486 I/O 780-FBGA | Intel / Altera
EP1M350F780C6 NrndAltera
EP1M350F780C8
EP1M350F780C8 - Mercury PLD FPGA 350K Gates 780-BGA | Altera
EP1M350F780C8 ObsoleteSpecification Comparison
| Parameter | EP1M350F780C6 | EP1M350F780C8 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $905.00 | $175.00 |
| Manufacturer | Intel (formerly Altera) | β |
| Series | Mercury FPGA | β |
| Logic Family | CMOS | β |
| Number of User I/Os | 486 | β |
| Total Pins / Balls | 780 | β |
| Package | 780-FBGA (FineLine BGA), 29 mm x 29 mm | 780-ball FineLine BGA |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Core Supply Voltage | 1.8 V (1.71 V to 1.89 V) | β |
| Operating Temperature | 0 C to 85 C (TJ, commercial grade) | 0C to +85C (commercial) |
| Integrated Transceivers | Yes, up to 1.25 Gbps with CDR support | β |
| Logic Elements / LUTs | [DATA_NEEDED: logic element count] | β |
| On-chip Memory | [DATA_NEEDED: embedded memory size] | β |
| RoHS Status | Non-compliant (per one distributor listing) | unknown (legacy device) |
| Lead Free Status | [DATA_NEEDED: lead-free status] | β |
| Package Style | Bulk tray per distributor listings | β |
| Device Type | FPGA (Field Programmable Gate Array) | β |
| Programmable Logic Type | In-system programmable | β |
| Device Family | β | Altera APEX Mercury (EP1M) |
| Typical Gates | β | 350,000 |
| Maximum Logic Elements (LEs) | β | 12,160 |
| Embedded RAM Blocks | β | 4 dual-port RAM blocks |
| Speed Grade | β | C8 (commercial, speed bin 8) |
| Supply Voltage (Core) | β | [DATA_NEEDED: core Vcc] |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI, SSTL, LVDS (up to 20 standards) |
| Global Clock Networks | β | 8 |
| Configuration Interface | β | IEEE 1532 / passive serial / JTAG |
| Maximum User I/O | β | [DATA_NEEDED: user I/O count] |
| In-System Programmability | β | Yes (ISP via JTAG) |
| MSL Level | β | [DATA_NEEDED: MSL rating] |