EP1M350F780C8 vs EP1M350F780C6N Comparison
Detailed side-by-side comparison of EP1M350F780C8 by Altera and EP1M350F780C6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP1M350F780C6N - Mercury 350K FPGA, 486 I/O, 780-BGA | Intel (Altera)
EP1M350F780C6N β Last Time BuySpecification Comparison
| Parameter | EP1M350F780C8 | EP1M350F780C6N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $175.00 | $219.40 |
| Device Family | Altera APEX Mercury (EP1M) | β |
| Typical Gates | 350,000 | β |
| Maximum Logic Elements (LEs) | 12,160 | β |
| Embedded RAM Blocks | 4 dual-port RAM blocks | β |
| Package | 780-ball FineLine BGA | 780-ball FC-FBGA (FINE LINE BGA-780) |
| Speed Grade | C8 (commercial, speed bin 8) | β |
| Operating Temperature | 0C to +85C (commercial) | 0 C to 85 C |
| Supply Voltage (Core) | [DATA_NEEDED: core Vcc] | β |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, SSTL, LVDS (up to 20 standards) | β |
| Global Clock Networks | 8 | β |
| Configuration Interface | IEEE 1532 / passive serial / JTAG | JTAG (IEEE 1149.1) / passive serial |
| Maximum User I/O | [DATA_NEEDED: user I/O count] | β |
| In-System Programmability | Yes (ISP via JTAG) | β |
| RoHS Status | unknown (legacy device) | [DATA_NEEDED: rohs_status] |
| Mounting Type | Surface Mount (BGA) | β |
| MSL Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: msl_level] |
| Family | β | Mercury (EP1M350) |
| Device Type | β | Loadable Programmable Logic Device (PLD) / FPGA |
| Logic Family | β | CMOS, SRAM-based LUT |
| System Gates | β | 350,000 |
| Logic Cells / Elements | β | 14,400 |
| User I/Os | β | 486 |
| Integrated Transceivers | β | Yes, with CDR up to 1.25 Gbps |
| Core Supply Voltage | β | 1.8 V |
| Terminal Form | β | Ball |
| Package Code (JEDEC) | β | S-PBGA-B780 |
| Lead-Free | β | [DATA_NEEDED: lead_free] |
| Architecture | β | Look-up table (LUT)-based, optimized for high-speed serial I/O |
| Total Package Pins / Balls | β | 780 |