EP1M350F780I5N vs EP1M350F780C6N Comparison
Detailed side-by-side comparison of EP1M350F780I5N by Altera and EP1M350F780C6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP1M350F780C6N - Mercury 350K FPGA, 486 I/O, 780-BGA | Intel (Altera)
EP1M350F780C6N β Last Time BuySpecification Comparison
| Parameter | EP1M350F780I5N | EP1M350F780C6N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $195.00 | $219.40 |
| Family | Mercury PLD | Mercury (EP1M350) |
| Manufacturer | Altera (now Intel) | β |
| Typical Gates | 350,000 | β |
| Logic Elements | [DATA_NEEDED: exact LE count] | β |
| Core Voltage | 1.5 V | β |
| I/O Voltage Standards | 1.5 V / 1.8 V / 2.5 V / 3.3 V | β |
| Package | 780-pin FBGA (FineLine BGA) | 780-ball FC-FBGA (FINE LINE BGA-780) |
| Process Technology | 0.15 um CMOS | β |
| Configuration Memory | SRAM-based | β |
| Operating Temperature Grade | Industrial -40C to +85C | β |
| Speed Grade | 5 | β |
| High-Speed Transceivers | Embedded (per Mercury family) | β |
| PLLs | Dedicated (per Mercury family) | β |
| Embedded Memory | Dual-port RAM blocks | β |
| Lead-Free / RoHS | Yes (per 'N' suffix) | β |
| Design Software | Altera Quartus II | β |
| Programming Interface | JTAG / Passive Serial | β |
| Device Type | β | Loadable Programmable Logic Device (PLD) / FPGA |
| Logic Family | β | CMOS, SRAM-based LUT |
| System Gates | β | 350,000 |
| Logic Cells / Elements | β | 14,400 |
| User I/Os | β | 486 |
| Integrated Transceivers | β | Yes, with CDR up to 1.25 Gbps |
| Core Supply Voltage | β | 1.8 V |
| Terminal Form | β | Ball |
| Package Code (JEDEC) | β | S-PBGA-B780 |
| Operating Temperature | β | 0 C to 85 C |
| Configuration Interface | β | JTAG (IEEE 1149.1) / passive serial |
| RoHS Status | β | [DATA_NEEDED: rohs_status] |
| MSL Level | β | [DATA_NEEDED: msl_level] |
| Lead-Free | β | [DATA_NEEDED: lead_free] |
| Architecture | β | Look-up table (LUT)-based, optimized for high-speed serial I/O |
| Total Package Pins / Balls | β | 780 |