EP1M350F780I6N vs EP1M350F780C8 Comparison

Detailed side-by-side comparison of EP1M350F780I6N by Altera and EP1M350F780C8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1M350F780I6N EP1M350F780C8
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $165.00 $175.00
Series Mercury β€”
Family Mercury Family FPGA β€”
Equivalent Gates 350K β€”
Logic Cells / Elements 14,400 β€”
Logic Array Blocks (LABs) 1,440 β€”
Total RAM Bits 114,688 β€”
User I/Os 486 β€”
Core Supply Voltage 1.8 V (1.71 V to 1.89 V) β€”
Transceiver Data Rate Up to 1.25 Gbps (with CDR) β€”
Logic Family / Process CMOS β€”
Package Type 780-FBGA (FineLine BGA, FINE LINE) β€”
Package Dimensions 29 mm x 29 mm β€”
Mounting Type Surface Mount Surface Mount (BGA)
Operating Temperature -40 Β°C to +85 Β°C (industrial, I6) 0C to +85C (commercial)
MSL Level 3 [DATA_NEEDED: MSL rating]
RoHS Status [DATA_NEEDED: rohs_status] unknown (legacy device)
Architecture LUT-based, high-speed optimized β€”
Device Family β€” Altera APEX Mercury (EP1M)
Typical Gates β€” 350,000
Maximum Logic Elements (LEs) β€” 12,160
Embedded RAM Blocks β€” 4 dual-port RAM blocks
Package β€” 780-ball FineLine BGA
Speed Grade β€” C8 (commercial, speed bin 8)
Supply Voltage (Core) β€” [DATA_NEEDED: core Vcc]
I/O Standards Supported β€” LVTTL, LVCMOS, PCI, SSTL, LVDS (up to 20 standards)
Global Clock Networks β€” 8
Configuration Interface β€” IEEE 1532 / passive serial / JTAG
Maximum User I/O β€” [DATA_NEEDED: user I/O count]
In-System Programmability β€” Yes (ISP via JTAG)

Datasheets & Resources

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