EP1S25F780C5N vs EP1S25F780I6N Comparison
Detailed side-by-side comparison of EP1S25F780C5N by Intel and EP1S25F780I6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP1S25F780I6N - Stratix 25,660-LE FPGA, 780-BBGA, Industrial | Altera/Intel
EP1S25F780I6N ObsoleteSpecification Comparison
| Parameter | EP1S25F780C5N | EP1S25F780I6N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $595.00 | $1,250.00 |
| Family | Stratix | Stratix |
| Logic Elements | 25,660 | 25,660 |
| Logic Array Blocks (LABs) | 2,566 | 2,566 |
| Maximum User I/O | 597 | β |
| Package | 780-ball FBGA, 29 x 29 mm, 1.0 mm pitch | 780-BBGA (FineLine BGA, 29 x 29 mm, 1.0 mm pitch) |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | β |
| Operating Temperature | 0 C to 85 C (Commercial Extended) | 0C to 85C (industrial) |
| Embedded Memory | TriMatrix memory blocks, up to ~1.92 Mbits total | β |
| DSP Blocks | Dedicated multiplier/accumulator blocks | Yes (dedicated 9/18/36-bit multipliers) |
| PLLs | 4 | β |
| I/O Banks | 12 | β |
| Maximum Frequency (internal) | up to 500 MHz logic, 420 MHz DSP | β |
| Supported I/O Standards | LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, PCI, PCI-X | β |
| Configuration Modes | Passive Serial, Passive Parallel Sync/Async, JTAG | β |
| RoHS Status | [DATA_NEEDED: confirm per specific reel lot] | [DATA_NEEDED: rohs status] |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| MSL Level | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] | 3 (per Partstack listing) |
| Total RAM Bits | β | 1,944,576 |
| User I/O Pins | β | 597 |
| Core Voltage | β | 1.5 V |
| Speed Grade | β | 6 (I6 - industrial) |
| Lead Free | β | Yes (per Ampheo listing) |
| Embedded PLL | β | Yes |
| LVDS Support | β | Yes (up to 840 Mbps per Altera datasheet family) |
| Configuration Mode | β | JTAG / Passive Serial / Fast Passive Parallel (per Stratix family) |