EP1S25F780I6N vs EP1S25F780C5N Comparison

Detailed side-by-side comparison of EP1S25F780I6N by Intel and EP1S25F780C5N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP1S25F780I6N EP1S25F780C5N
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $1,250.00 $595.00
Family Stratix Stratix
Logic Elements 25,660 25,660
Logic Array Blocks (LABs) 2,566 2,566
Total RAM Bits 1,944,576 β€”
User I/O Pins 597 β€”
Package 780-BBGA (FineLine BGA, 29 x 29 mm, 1.0 mm pitch) 780-ball FBGA, 29 x 29 mm, 1.0 mm pitch
Process Technology 130 nm CMOS 130 nm CMOS
Core Voltage 1.5 V β€”
Speed Grade 6 (I6 - industrial) β€”
Operating Temperature 0C to 85C (industrial) 0 C to 85 C (Commercial Extended)
Mounting Type Surface Mount (BGA) Surface Mount (BGA)
MSL Level 3 (per Partstack listing) [DATA_NEEDED: MSL rating per JEDEC J-STD-020]
Lead Free Yes (per Ampheo listing) β€”
RoHS Status [DATA_NEEDED: rohs status] [DATA_NEEDED: confirm per specific reel lot]
DSP Blocks Yes (dedicated 9/18/36-bit multipliers) Dedicated multiplier/accumulator blocks
Embedded PLL Yes β€”
LVDS Support Yes (up to 840 Mbps per Altera datasheet family) β€”
Configuration Mode JTAG / Passive Serial / Fast Passive Parallel (per Stratix family) β€”
Maximum User I/O β€” 597
Core Supply Voltage β€” 1.5 V
Embedded Memory β€” TriMatrix memory blocks, up to ~1.92 Mbits total
PLLs β€” 4
I/O Banks β€” 12
Maximum Frequency (internal) β€” up to 500 MHz logic, 420 MHz DSP
Supported I/O Standards β€” LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, PCI, PCI-X
Configuration Modes β€” Passive Serial, Passive Parallel Sync/Async, JTAG

Datasheets & Resources

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