EP20K1000CF672C8N vs EP20K1000CF672C8ES Comparison
Detailed side-by-side comparison of EP20K1000CF672C8N by Intel and EP20K1000CF672C8ES by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K1000CF672C8ES - 1M-gate APEX20KE FPGA, 672-BGA | Intel
EP20K1000CF672C8ES β Last Time BuySpecification Comparison
| Parameter | EP20K1000CF672C8N | EP20K1000CF672C8ES |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $178.40 | $285.00 |
| Device Family | APEX 20KC | β |
| Device Type | FPGA (Field Programmable Gate Array) | β |
| Logic Elements / Cells | 38,400 | β |
| Equivalent Gate Count | 1,000,000 gates | β |
| Embedded Memory (bits) | 327,680 | β |
| Number of I/Os | 488 to 508 | β |
| Number of Pins / Balls | 672 | β |
| Package | 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA), 45 x 45 mm, 1.27 mm pitch | 672-ball FineLine BGA |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Operating Temperature | 0Β°C to 85Β°C (Commercial) | Commercial (0C to +85C) |
| Supply Voltage (Vccint) | 1.8 V | β |
| Process Technology | 0.15 Β΅m all-layer copper | 0.18 Β΅m CMOS |
| Internal Operating Frequency (max) | 301.21 MHz | β |
| Propagation Delay (typ.) | 1.6 ns to 1.79 ns | β |
| Architecture | MultiCore (LUT + embedded memory + product-term) | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free finish status] | β |
| Pin-to-Pin Compatibility | APEX 20KE family (same 672-ball BGA) | β |
| Family | β | APEX 20K (APEX20KE) |
| Logic Elements | β | 38,400 |
| Typical Gates | β | 25,920 |
| Maximum System Gates | β | 1,000,000 |
| Embedded Memory (ESB) | β | 216 Kbits |
| User I/O Pins | β | 508 |
| Speed Grade | β | C8 |
| Core Voltage (VCCINT) | β | 2.5 V |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI, LVDS, LVPECL, GTL, SSTL-2/3 |
| PLLs | β | 4 (ClockLock/ClockBoost) |
| Programming Interface | β | JTAG (IEEE 1149.1 / IEEE 1532) |
| MSL Level | β | 3 (168 hours) |