EP20K1000EBI652-2 vs EP20K1500EBC652-1X Comparison
Detailed side-by-side comparison of EP20K1000EBI652-2 by Altera and EP20K1500EBC652-1X by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K1000EBI652-2 - APEX 20KE 1M Gates FPGA, BGA-652 | Intel / Altera
EP20K1000EBI652-2 ObsoleteAltera
EP20K1500EBC652-1X - APEX 20KE 1.5M Gates FPGA | Altera | BGA-652
EP20K1500EBC652-1X ObsoleteSpecification Comparison
| Parameter | EP20K1000EBI652-2 | EP20K1500EBC652-1X |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $105.00 | $175.00 |
| Device Family | APEX 20KE | β |
| Logic Elements | 38,400 | β |
| Typical Gates | 1,000,000 | β |
| Maximum User I/O | 488 | β |
| Package | BGA-652 (FineLine BGA, 45 x 45 mm) | 652-ball BGA (FCBGA / PBGA652) |
| Ball Pitch | 1.27 mm | β |
| Speed Grade | -2 | β |
| Operating Temperature Range | Industrial -40C to +100C | β |
| Supply Voltage (Core) | 1.8 V | β |
| Process Technology | 0.18 micrometer CMOS, all-layer copper | 0.22 Β΅m CMOS |
| Embedded System Block Memory | [DATA_NEEDED: ESB memory size] | β |
| Embedded Multiplier/Accumulator Blocks | [DATA_NEEDED: number of multiplier blocks] | β |
| Phase-Locked Loops (PLLs) | 4 | β |
| Propagation Delay | 1.6 ns | 1.84 ns |
| Internal Operating Frequency | 350 MHz | β |
| Configuration Modes | PS, PPS, PPA, JTAG | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance] |
| MSL Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| Family | β | APEX 20KE |
| Logic Elements / Cells | β | 51840 |
| System Gates | β | 1.5 M |
| Macros | β | 3456 |
| Total RAM Bits | β | 442368 |
| User I/O | β | 488 |
| Number of I/O Banks | β | [DATA_NEEDED: I/O bank count] |
| Internal Frequency | β | 160 MHz (per digchip) / 400 MHz (per fpgakey) |
| Core Voltage | β | 1.8 V |
| Operating Temperature | β | 0 Β°C to +85 Β°C (commercial) |
| Configuration Method | β | JTAG / SRAM |
| Architecture | β | MultiCore (LUT + product-term) |