EP20K1000EFI672-2X vs EP20K1000CB652C7NJ Comparison
Detailed side-by-side comparison of EP20K1000EFI672-2X by Intel and EP20K1000CB652C7NJ by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K1000EFI672-2X | EP20K1000CB652C7NJ |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $305.00 | $175.00 |
| Family | APEX-20KE | APEX 20KC |
| Device Type | SPLD / FPGA | β |
| Logic Elements / Cells | 38400 | β |
| System Gates | 1,000,000 | 1,000,000 |
| Number of Macros | 2560 | β |
| Embedded Memory (Bits) | 327680 | β |
| User I/Os | 508 | β |
| Number of I/O Banks | [DATA_NEEDED: I/O banks] | β |
| Propagation Delay | 1.6 ns | β |
| Core Voltage | 1.8 V | β |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V | β |
| Operating Temperature | 0C to +85C | Commercial (0C to +70C) per C7 speed grade |
| Package Type | 672-BBGA (FineLine BGA, 45 x 45 mm, 1.27 mm pitch) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Process Technology | 0.15 micron all-layer copper-metal | 0.15 um CMOS (all-layer copper) |
| JTAG Support | IEEE 1149.1 boundary-scan | β |
| PLL Count | 4 | β |
| Speed Grade | -2X | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| Logic Elements | β | 38,400 |
| Embedded Memory | β | 327,680 bits |
| User I/O Pins | β | 488 |
| Maximum Frequency | β | 375.94 MHz |
| Core Supply Voltage | β | 1.8 V |
| Package | β | 652-pin FCBGA (FineLine BGA) |
| Configuration Interface | β | JTAG (ByteBlaster/MasterBlaster) + serial/parallel modes |
| PLLs | β | 4 |
| Pin-Compatible Family | β | APEX 20KE |
| Design Software | β | Quartus II (legacy Altera IDE) |
| Lifecycle | β | Obsolete - last time buy per Altera PCN |