EP20K100ETC144-1N vs EP20K100EFC144-1 Comparison
Detailed side-by-side comparison of EP20K100ETC144-1N by Altera and EP20K100EFC144-1 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K100ETC144-1N
EP20K100ETC144-1N - APEX-20KE FPGA 100K Gates 144-LQFP | Altera
EP20K100ETC144-1N ObsoleteIntel
EP20K100EFC144-1
EP20K100EFC144-1 - APEX 20KE FPGA, 100K Gates, 144-FBGA | Intel
EP20K100EFC144-1 NrndSpecification Comparison
| Parameter | EP20K100ETC144-1N | EP20K100EFC144-1 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $55.80 | $61.75 |
| Family | APEX-20KE | β |
| Logic Elements | 53248 | 4,160 |
| Logic Cells | 4160 | β |
| System Gates | 100000 | β |
| User I/Os | 92 | 93 |
| Package | 144-LQFP (TQFP) | β |
| Process Technology | 0.22 Β΅m CMOS | 0.15-Β΅m all-layer copper |
| Core Voltage | 1.8 V | β |
| Operating Temperature | 0 Β°C to +85 Β°C | 0 Β°C to 85 Β°C (commercial) |
| Embedded Array Blocks (EABs) | Yes (32-bit x 2K RAM/ROM/FIFO) | β |
| Configuration Interface | JTAG (IEEE 1149.1) / IEEE 1532 ISC | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Unknown [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Programming Software | MAX+PLUS II / Quartus II (legacy) | β |
| Device Series | APEX 20K 416 Macro 92 IOs | β |
| Device Family | β | APEX 20KE |
| Device Type | β | FPGA (Field Programmable Gate Array) |
| Typical Gates | β | 100,000 |
| Maximum System Gates | β | 263,000 |
| Embedded System Blocks (ESBs) | β | Yes (memory + dedicated logic) |
| Propagation Delay | β | 1.6 ns |
| PLLs | β | 4 |
| Package Type | β | 144-ball FBGA (13x13 mm, 1.0 mm pitch) |
| Core Voltage (VCCINT) | β | 1.71 V to 1.89 V |
| I/O Voltage Support | β | 1.8 V / 2.5 V / 3.3 V (multiVolt I/O) |
| Configuration Method | β | SRAM (volatile) - external boot PROM required |
| Boundary-Scan Support | β | IEEE 1149.1 (JTAG) |