EP20K1500CF33C9 vs EP20K1500CF33C8 Comparison
Detailed side-by-side comparison of EP20K1500CF33C9 by Intel and EP20K1500CF33C8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K1500CF33C9 - APEX 20K 1.5M Gates FPGA | Intel (Altera) | 1020-FBGA
EP20K1500CF33C9 Obsolete
Specification Comparison
| Parameter | EP20K1500CF33C9 | EP20K1500CF33C8 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $68.50 | $1,090.00 |
| Family | APEX 20K | APEX 20K |
| Series | EP20K1500 | β |
| Device Type | FPGA (SRAM-based, in-system programmable) | β |
| Approximate System Gates | 1,500,000 | β |
| Logic Elements (max, family) | 212,992 | β |
| Embedded Memory (ESB, max, family) | 432 Kbit | β |
| Package Code | HBGA / FineLine BGA | β |
| Pin / Ball Count | 1020 | β |
| Package Size | 33 x 33 mm | β |
| User I/O Count (family) | 808 | β |
| Operating Temperature | 0C to +85C (Commercial, C grade) | 0 Β°C to +85 Β°C (Commercial) |
| Speed Grade | -9 (fastest commercial) | β |
| Supply Voltage (core) | 1.8 V typical | β |
| Configuration Mode | SRAM / JTAG (in-system) | β |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| RoHS Status | Unknown (legacy family) | Compliant per distributor listings |
| Lifecycle Status | Obsolete / Last-time-buy (per Intel PDN) | β |
| Logic Elements / Cells | β | 51,840 |
| Total RAM Bits | β | 442,368 |
| Number of Gates (typical) | β | 1,500,000 |
| Number of I/O | β | 808 (maximum user I/O) |
| Number of LABs/CLBs | β | 2,592 LABs (organized in MegaLABs) |
| Number of Embedded System Blocks | β | 216 ESBs |
| Number of PLLs | β | 4 |
| Supply Voltage (VCCINT) | β | 1.8 V (typical for APEX 20K core) |
| Supply Voltage (VCCIO) | β | 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) |
| Package / Case | β | 1020-BBGA, FCBGA (FineLine BGA) |
| Number of Terminals | β | 1020 balls |
| Process Technology | β | 0.18 Β΅m CMOS, SRAM-based configuration |
| Configuration | β | SRAM-based, JTAG (IEEE 1149.1) |
| Lead-Free | β | Yes (per distributor specifications) |