EP20K1500CF33C9 vs EP20K1500CF33C8ES Comparison
Detailed side-by-side comparison of EP20K1500CF33C9 by Intel and EP20K1500CF33C8ES by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K1500CF33C9 - APEX 20K 1.5M Gates FPGA | Intel (Altera) | 1020-FBGA
EP20K1500CF33C9 Obsolete
Specification Comparison
| Parameter | EP20K1500CF33C9 | EP20K1500CF33C8ES |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last_time_buy |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $68.50 | $288.00 |
| Family | APEX 20K | β |
| Series | EP20K1500 | APEX 20K (APEX 20KE family) |
| Device Type | FPGA (SRAM-based, in-system programmable) | β |
| Approximate System Gates | 1,500,000 | β |
| Logic Elements (max, family) | 212,992 | β |
| Embedded Memory (ESB, max, family) | 432 Kbit | β |
| Package Code | HBGA / FineLine BGA | β |
| Pin / Ball Count | 1020 | β |
| Package Size | 33 x 33 mm | β |
| User I/O Count (family) | 808 | β |
| Operating Temperature | 0C to +85C (Commercial, C grade) | [DATA_NEEDED: operating temperature range] |
| Speed Grade | -9 (fastest commercial) | -1 (C8) |
| Supply Voltage (core) | 1.8 V typical | β |
| Configuration Mode | SRAM / JTAG (in-system) | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | Unknown (legacy family) | [DATA_NEEDED: RoHS compliance for ES variant] |
| Lifecycle Status | Obsolete / Last-time-buy (per Intel PDN) | β |
| Manufacturer | β | Intel (formerly Altera) |
| System Gates | β | 1,500,000 |
| Maximum Gates (Equivalent) | β | 2,392,000 |
| Logic Elements | β | 51,840 |
| Embedded System Block (ESB) Bits | β | 442,368 |
| CAM Bits | β | 216 Kbit |
| Number of PLLs | β | 4 |
| Number of Clocks | β | 8 clock pins |
| Maximum User I/O | β | 808 (1020-FBGA) |
| Package | β | 1020-FBGA (FCBGA), 33x33 mm |
| Voltage - Supply (Core) | β | 1.8 V nominal (multiVolt I/O supports 1.8/2.5/3.3/5.0 V) |
| I/O Standard Support | β | LVTTL, LVCMOS, PCI, SSTL, HSTL, LVDS (multiVolt) |
| JTAG / Boundary Scan | β | IEEE 1149.1 compliant |
| Programming Interface | β | ByteBlaster / MasterBlaster / Altera USB-Blaster |
| Sample Tier | β | ES (engineering sample) |
| Lead-Free | β | [DATA_NEEDED: lead-free status] |