EP20K160EQC208-3N vs EP20K200EQC208-3 Comparison
Detailed side-by-side comparison of EP20K160EQC208-3N by Altera and EP20K200EQC208-3 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K160EQC208-3N | EP20K200EQC208-3 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $52.40 | $65.00 |
| Family | APEX 20KE | APEX 20KE |
| Series | EP20K160 | APEX 20K (enhanced "E" variant) |
| Device Logic Elements | 6,400 | β |
| System Gates | 160,000 | β |
| Number of Macros | 640 | β |
| Embedded Memory (bits) | 81,920 | β |
| Number of User I/Os | 143 | β |
| Maximum Internal Frequency | 323 MHz | β |
| Propagation Delay | 1.55 ns | β |
| Process Technology | 0.22 Β΅m CMOS | β |
| Core Supply Voltage | 1.8 V | β |
| Operating Temperature Range | 0 Β°C to 85 Β°C (TJ) | β |
| Package Type | 208-BFQFP (PQFP, gull-wing) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Speed Grade | -3 (commercial) | -3 |
| Lead-Free (Pb-Free) | Yes (N suffix) | β |
| RoHS Status | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS compliance status] |
| Configuration Interface | JTAG (IEEE 1149.1) + serial/parallel | β |
| Product Type | β | FPGA (Field Programmable Gate Array), SRAM-based, in-system programmable |
| System Gates (typical) | β | 200,000 |
| Logic Elements (LEs) | β | 8,320 |
| Embedded RAM Bits | β | 106,496 |
| Maximum User I/O | β | 136 |
| Core Supply Voltage (VCCINT) | β | 2.5 V (typical, APEX 20KE generation) |
| I/O Supply Voltage (VCCIO) | β | MultiVolt, 1.8 V / 2.5 V / 3.3 V / 5 V compatible |
| Package | β | 208-BFQFP / PQFP208 (Plastic Quad Flat Pack, gull-wing) |
| Terminal Pitch | β | 0.5 mm |
| Technology | β | CMOS, SRAM configuration cell |
| Configuration Mode | β | Fast Passive Parallel (FPP), Passive Serial (PS), JTAG (IEEE 1149.1) |
| Embedded Array Blocks (EABs) | β | Yes (dual-port RAM/ROM, up to 16-bit wide) |
| MultiVolt I/O Support | β | Yes |
| LVDS Support | β | True-LVDS (enhanced "E" variant feature) |
| Moisture Sensitivity Level (MSL) | β | 3 (168 Hours) |
| Operating Temperature (Commercial) | β | 0 Β°C to 85 Β°C |