EP20K200BC484-1X vs EP20K200CF484C7ES Comparison
Detailed side-by-side comparison of EP20K200BC484-1X by Altera and EP20K200CF484C7ES by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K200BC484-1X - APEX-20K 200K-Gate FPGA 382 I/O 484-BGA | Altera
EP20K200BC484-1X ObsoleteSpecification Comparison
| Parameter | EP20K200BC484-1X | EP20K200CF484C7ES |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $75.10 | $92.00 |
| Product Family | APEX-20K | β |
| Series | EP20K200 | APEX 20KC |
| Logic Elements / Cells | 8320 | 8,320 |
| Total RAM Bits | 106496 | 106,496 |
| Number of I/O | 382 | 377 (max) |
| Number of Logic Gates | 200000 | β |
| Package Type | 484-BBGA (Fine-pitch Ball Grid Array) | β |
| Package Suffix | BC484 | β |
| Speed Grade | -1 (slowest commercial grade) | C7 (7 ns) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +85C (commercial, [DATA_NEEDED: full Tjj range]) | 0C to +85C (commercial) |
| Configuration Method | SRAM - external serial/parallel PROM | β |
| JTAG Support | IEEE 1149.1 boundary-scan | β |
| PLL | ClockLock / ClockBoost | β |
| Embedded Memory Blocks | Embedded System Blocks (ESBs) - RAM/ROM/CAM | β |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: rohs_status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | β |
| Family | β | APEX-20KC |
| Typical Gates | β | 200,000 |
| Number of LABs/CLBs | β | 376 |
| Voltage - Supply | β | 1.8 V core |
| Package / Case | β | 484-BBGA (FineLine BGA) |
| Process Technology | β | 0.18 Β΅m CMOS |
| Silicon Status | β | ES (Engineering Sample) |
| Maximum Internal Frequency | β | 375.94 MHz |
| Number of PLLs | β | [DATA_NEEDED: pll_count] |