EP20K200BC484-1X vs EP20K200EFC484-2N Comparison
Detailed side-by-side comparison of EP20K200BC484-1X by Altera and EP20K200EFC484-2N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K200BC484-1X - APEX-20K 200K-Gate FPGA 382 I/O 484-BGA | Altera
EP20K200BC484-1X ObsoleteSpecification Comparison
| Parameter | EP20K200BC484-1X | EP20K200EFC484-2N |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $75.10 | $175.00 |
| Product Family | APEX-20K | β |
| Series | EP20K200 | β |
| Logic Elements / Cells | 8320 | β |
| Total RAM Bits | 106496 | 106,496 |
| Number of I/O | 382 | β |
| Number of Logic Gates | 200000 | β |
| Package Type | 484-BBGA (Fine-pitch Ball Grid Array) | β |
| Package Suffix | BC484 | β |
| Speed Grade | -1 (slowest commercial grade) | -2 |
| Mounting Type | Surface Mount | Surface Mount (BGA) |
| Operating Temperature | 0C to +85C (commercial, [DATA_NEEDED: full Tjj range]) | 0 Β°C to +85 Β°C (Commercial) |
| Configuration Method | SRAM - external serial/parallel PROM | β |
| JTAG Support | IEEE 1149.1 boundary-scan | β |
| PLL | ClockLock / ClockBoost | β |
| Embedded Memory Blocks | Embedded System Blocks (ESBs) - RAM/ROM/CAM | β |
| MSL Level | [DATA_NEEDED: MSL level] | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Family | β | APEX-20KE |
| Product Type | β | FPGA - Field Programmable Gate Array |
| System Gates | β | 200,000 |
| Logic Elements | β | 8,320 |
| Embedded System Blocks (ESB) | β | 52 (True Dual-Port RAM) |
| Maximum User I/O | β | 376 |
| Package | β | 484-FBGA (FineLine BGA), 23x23 mm, 1.0 mm pitch |
| Core Voltage | β | 1.8 V |
| Supply Voltage Range | β | 1.71 V to 1.89 V |
| Process Technology | β | 0.22 Β΅m CMOS |
| Logic Family | β | CMOS |
| Propagation Delay (typ.) | β | 2.5 ns |
| Configuration Modes | β | Passive Serial, Passive Parallel Async, JTAG |
| PLLs | β | 4 |