EP20K200CB356C8N vs EP20K200EBC356-1 Comparison
Detailed side-by-side comparison of EP20K200CB356C8N by Altera and EP20K200EBC356-1 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K200CB356C8N | EP20K200EBC356-1 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $56.40 | $142.00 |
| Family | APEX 20KC | APEX 20K (APEX 20KE) |
| Series | EP20K200 | β |
| Device Type | SRAM-based LUT FPGA | β |
| System Gates | 200,000 | 200,000 |
| Logic Elements (Cells) | 8,320 | β |
| Maximum Internal Frequency | 301.21 MHz | β |
| Process Technology | 0.15 um CMOS | 0.22 Β΅m CMOS |
| Propagation Delay (tpd) | 1.78 ns | β |
| Nominal Core Supply Voltage | 1.8 V | β |
| Core Supply Voltage Range | 1.71 V to 1.89 V | β |
| Number of User I/O Pins | 263 | β |
| Number of Dedicated Inputs | 4 | β |
| Total Macrocells / Output Functions | 263 | β |
| Embedded Memory Bits | 106,496 bits | β |
| Number of PLLs | 4 | β |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V | β |
| Differential Signaling | LVDS | β |
| Configuration Interface | Serial / JTAG (IEEE 1149.1) | β |
| Package | 356-ball LBGA | 356-ball LBGA (35 x 35 mm) |
| Operating Temperature (commercial "C") | 0 C to +85 C (TJ) | β |
| Terminal Finish ("N") | Lead-free / Pb-free | β |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status not stated in verified sources] |
| Moisture Sensitivity Level (MSL) | [DATA_NEEDED: MSL rating] | β |
| Logic Elements / Cells | β | 8,320 |
| Maximum User I/Os | β | 277 |
| Core Voltage | β | 1.8 V (1.71 V to 1.89 V) |
| Propagation Delay | β | 2.5 ns |
| Internal Performance | β | Up to 367 MHz |
| Mounting Type | β | Surface Mount (BGA) |
| Operating Temperature | β | 0 Β°C to 85 Β°C (Commercial) |
| Architecture | β | MultiCore (LUT + product-term + embedded memory) |
| On-chip Memory | β | Embedded System Blocks (ESB / SRAM) |
| Configuration Method | β | JTAG (ByteBlaster / MasterBlaster), passive serial |
| Development Software | β | Altera Quartus II |
| Lifecycle Status | β | Obsolete / EOL |