EP20K200CF484C8 vs EP20K200CF484I9 Comparison

Detailed side-by-side comparison of EP20K200CF484C8 by Intel and EP20K200CF484I9 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K200CF484C8 EP20K200CF484I9
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $410.75 $138.00
Family APEX 20KC APEX 20KC (APEX 20K with ESB/CAM)
Logic Elements 8,320 β€”
System Gates 200,000 β€”
Embedded Memory Bits 106,496 bits β€”
Maximum User I/O 376 376
Package 484-FBGA (FineLine BGA, 23x23 mm) 484-ball FineLine BGA (FBGA), 1.00 mm pitch
Process Technology 0.15 Β΅m CMOS 0.15 um CMOS
Core Voltage 1.8 V β€”
Operating Temperature Commercial (0C to +85C) β€”
Maximum Frequency 301.21 MHz (per FPGAkey listing) β€”
Embedded Memory Type ESB (Embedded System Block) β€” RAM/ROM/CAM/FIFO β€”
Configuration Modes Passive Serial, Passive Parallel Synchronous, Active Serial β€”
Supported I/O Standards LVTTL, LVCMOS, PCI, GTL+ β€”
RoHS Status Non-compliant (per alterachips.com listing) unknown - confirm with supplier (legacy part)
Mounting Type Surface Mount (BGA) β€”
Series β€” APEX 20KC
Typical Gates β€” 200,000
Logic Elements (Cells) β€” 8,320
Dedicated Inputs β€” 4
Total Terminals β€” 484 (balls)
Core Supply Voltage (VCCINT) β€” 1.8 V nominal (1.71 V to 1.89 V)
Operating Temperature Grade β€” Industrial (I)
Junction Temperature Range β€” -40 C to +100 C
Speed Grade β€” -9 (lowest speed in EP20K200 family)
Configuration Method β€” SRAM, JTAG in-system programmable
Lifecycle β€” Obsolete - EOL announced by Altera/Intel in 2008

Datasheets & Resources

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