EP20K200CF484C9N vs EP20K200CF484C7ES Comparison
Detailed side-by-side comparison of EP20K200CF484C9N by Altera and EP20K200CF484C7ES by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K200CF484C9N | EP20K200CF484C7ES |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $201.04 | $92.00 |
| Family | APEX 20KC | APEX-20KC |
| Device Type | FPGA (Field-Programmable Gate Array) | β |
| Typical Gates | 200,000 | 200,000 |
| Logic Elements | 8,320 | β |
| Embedded System Block (ESB) Bits | 106,496 | β |
| Maximum User I/O | 376 | β |
| Maximum Clock Frequency | 250 MHz | β |
| Process Technology | 0.15 um CMOS | 0.18 Β΅m CMOS |
| Core Supply Voltage (VCCINT) | 1.8 V | β |
| I/O Supply Voltage (VCCIO) | 3.3 V / 2.5 V / 1.8 V / 1.5 V (MultiVolt) | β |
| Package | 484-pin FineLine BGA (FBGA) | β |
| Speed Grade | C9 (250 MHz) | C7 (7 ns) |
| Temperature Grade | Industrial (0C to +85C) | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| Configuration Scheme | SRAM-based, supports passive serial/parallel and JTAG | β |
| MSL Level | 3 (per JEDEC J-STD-020) | β |
| RoHS Status | Compliant | [DATA_NEEDED: rohs_status] |
| Series | β | APEX 20KC |
| Logic Elements / Cells | β | 8,320 |
| Number of LABs/CLBs | β | 376 |
| Total RAM Bits | β | 106,496 |
| Number of I/O | β | 377 (max) |
| Voltage - Supply | β | 1.8 V core |
| Operating Temperature | β | 0C to +85C (commercial) |
| Package / Case | β | 484-BBGA (FineLine BGA) |
| Silicon Status | β | ES (Engineering Sample) |
| Maximum Internal Frequency | β | 375.94 MHz |
| Number of PLLs | β | [DATA_NEEDED: pll_count] |