EP20K200CF484C9N vs EP20K200CF484I9 Comparison
Detailed side-by-side comparison of EP20K200CF484C9N by Altera and EP20K200CF484I9 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K200CF484C9N | EP20K200CF484I9 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $201.04 | $138.00 |
| Family | APEX 20KC | APEX 20KC (APEX 20K with ESB/CAM) |
| Device Type | FPGA (Field-Programmable Gate Array) | β |
| Typical Gates | 200,000 | 200,000 |
| Logic Elements | 8,320 | β |
| Embedded System Block (ESB) Bits | 106,496 | β |
| Maximum User I/O | 376 | 376 |
| Maximum Clock Frequency | 250 MHz | β |
| Process Technology | 0.15 um CMOS | 0.15 um CMOS |
| Core Supply Voltage (VCCINT) | 1.8 V | 1.8 V nominal (1.71 V to 1.89 V) |
| I/O Supply Voltage (VCCIO) | 3.3 V / 2.5 V / 1.8 V / 1.5 V (MultiVolt) | β |
| Package | 484-pin FineLine BGA (FBGA) | 484-ball FineLine BGA (FBGA), 1.00 mm pitch |
| Speed Grade | C9 (250 MHz) | -9 (lowest speed in EP20K200 family) |
| Temperature Grade | Industrial (0C to +85C) | β |
| Mounting Type | Surface Mount (BGA) | β |
| Configuration Scheme | SRAM-based, supports passive serial/parallel and JTAG | β |
| MSL Level | 3 (per JEDEC J-STD-020) | β |
| RoHS Status | Compliant | unknown - confirm with supplier (legacy part) |
| Series | β | APEX 20KC |
| Logic Elements (Cells) | β | 8,320 |
| Dedicated Inputs | β | 4 |
| Total Terminals | β | 484 (balls) |
| Operating Temperature Grade | β | Industrial (I) |
| Junction Temperature Range | β | -40 C to +100 C |
| Configuration Method | β | SRAM, JTAG in-system programmable |
| Lifecycle | β | Obsolete - EOL announced by Altera/Intel in 2008 |