EP20K200CF484I9 vs EP20K200CF484C9N Comparison
Detailed side-by-side comparison of EP20K200CF484I9 by Altera and EP20K200CF484C9N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K200CF484I9 | EP20K200CF484C9N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $138.00 | $201.04 |
| Series | APEX 20KC | β |
| Family | APEX 20KC (APEX 20K with ESB/CAM) | APEX 20KC |
| Process Technology | 0.15 um CMOS | 0.15 um CMOS |
| Typical Gates | 200,000 | 200,000 |
| Logic Elements (Cells) | 8,320 | β |
| Maximum User I/O | 376 | 376 |
| Dedicated Inputs | 4 | β |
| Total Terminals | 484 (balls) | β |
| Package | 484-ball FineLine BGA (FBGA), 1.00 mm pitch | 484-pin FineLine BGA (FBGA) |
| Core Supply Voltage (VCCINT) | 1.8 V nominal (1.71 V to 1.89 V) | 1.8 V |
| Operating Temperature Grade | Industrial (I) | β |
| Junction Temperature Range | -40 C to +100 C | β |
| Speed Grade | -9 (lowest speed in EP20K200 family) | C9 (250 MHz) |
| Configuration Method | SRAM, JTAG in-system programmable | β |
| RoHS Status | unknown - confirm with supplier (legacy part) | Compliant |
| Lifecycle | Obsolete - EOL announced by Altera/Intel in 2008 | β |
| Device Type | β | FPGA (Field-Programmable Gate Array) |
| Logic Elements | β | 8,320 |
| Embedded System Block (ESB) Bits | β | 106,496 |
| Maximum Clock Frequency | β | 250 MHz |
| I/O Supply Voltage (VCCIO) | β | 3.3 V / 2.5 V / 1.8 V / 1.5 V (MultiVolt) |
| Temperature Grade | β | Industrial (0C to +85C) |
| Mounting Type | β | Surface Mount (BGA) |
| Configuration Scheme | β | SRAM-based, supports passive serial/parallel and JTAG |
| MSL Level | β | 3 (per JEDEC J-STD-020) |