EP20K200EBC652-3N vs EP20K1500EBC652-1X Comparison
Detailed side-by-side comparison of EP20K200EBC652-3N by Altera and EP20K1500EBC652-1X by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K1500EBC652-1X - APEX 20KE 1.5M Gates FPGA | Altera | BGA-652
EP20K1500EBC652-1X ObsoleteSpecification Comparison
| Parameter | EP20K200EBC652-3N | EP20K1500EBC652-1X |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $220.00 | $175.00 |
| Series | APEX 20KE (APEX-20KEยฎ) | โ |
| Device Family | EP20K200 | โ |
| System Gates | 200,000 | 1.5 M |
| Logic Elements / Cells | 8,320 | 51840 |
| Logic Array Blocks (LABs) | 832 | โ |
| Macrocells | 832 | โ |
| Embedded RAM | 106,496 bits | โ |
| User I/Os (DigiKey listing) | 376 | โ |
| User I/Os (digchip listing) | 277 | โ |
| Propagation Delay | 2.33 ns | 1.84 ns |
| Internal Frequency (max) | 189 MHz | โ |
| Process Technology | 0.22 ยตm CMOS | 0.22 ยตm CMOS |
| Core Supply Voltage | 1.71 V to 1.89 V (nominal 1.8 V) | โ |
| I/O Supply (LVDS-capable) | LVDS, 2.5 V referenced (per source variant) | โ |
| Package | 652-ball BGA | 652-ball BGA (FCBGA / PBGA652) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature (TJ) | 0 ยฐC to 85 ยฐC (commercial) | โ |
| Speed Grade | -3 (slowest in APEX 20KE family) | โ |
| Configuration | JTAG (IEEE 1149.1), Passive Serial | โ |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS compliance] |
| Family | โ | APEX 20KE |
| Macros | โ | 3456 |
| Total RAM Bits | โ | 442368 |
| User I/O | โ | 488 |
| Number of I/O Banks | โ | [DATA_NEEDED: I/O bank count] |
| Internal Frequency | โ | 160 MHz (per digchip) / 400 MHz (per fpgakey) |
| Core Voltage | โ | 1.8 V |
| Operating Temperature | โ | 0 ยฐC to +85 ยฐC (commercial) |
| MSL Level | โ | [DATA_NEEDED: MSL rating] |
| Configuration Method | โ | JTAG / SRAM |
| Architecture | โ | MultiCore (LUT + product-term) |