EP20K200EBC652-3N vs EP20K200EQC208-3 Comparison
Detailed side-by-side comparison of EP20K200EBC652-3N by Altera and EP20K200EQC208-3 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K200EBC652-3N | EP20K200EQC208-3 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $220.00 | $65.00 |
| Series | APEX 20KE (APEX-20KEยฎ) | APEX 20K (enhanced "E" variant) |
| Device Family | EP20K200 | โ |
| System Gates | 200,000 | โ |
| Logic Elements / Cells | 8,320 | โ |
| Logic Array Blocks (LABs) | 832 | โ |
| Macrocells | 832 | โ |
| Embedded RAM | 106,496 bits | โ |
| User I/Os (DigiKey listing) | 376 | โ |
| User I/Os (digchip listing) | 277 | โ |
| Propagation Delay | 2.33 ns | โ |
| Internal Frequency (max) | 189 MHz | โ |
| Process Technology | 0.22 ยตm CMOS | โ |
| Core Supply Voltage | 1.71 V to 1.89 V (nominal 1.8 V) | โ |
| I/O Supply (LVDS-capable) | LVDS, 2.5 V referenced (per source variant) | โ |
| Package | 652-ball BGA | 208-BFQFP / PQFP208 (Plastic Quad Flat Pack, gull-wing) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature (TJ) | 0 ยฐC to 85 ยฐC (commercial) | โ |
| Speed Grade | -3 (slowest in APEX 20KE family) | -3 |
| Configuration | JTAG (IEEE 1149.1), Passive Serial | โ |
| RoHS Status | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Family | โ | APEX 20KE |
| Product Type | โ | FPGA (Field Programmable Gate Array), SRAM-based, in-system programmable |
| System Gates (typical) | โ | 200,000 |
| Logic Elements (LEs) | โ | 8,320 |
| Embedded RAM Bits | โ | 106,496 |
| Maximum User I/O | โ | 136 |
| Core Supply Voltage (VCCINT) | โ | 2.5 V (typical, APEX 20KE generation) |
| I/O Supply Voltage (VCCIO) | โ | MultiVolt, 1.8 V / 2.5 V / 3.3 V / 5 V compatible |
| Terminal Pitch | โ | 0.5 mm |
| Technology | โ | CMOS, SRAM configuration cell |
| Configuration Mode | โ | Fast Passive Parallel (FPP), Passive Serial (PS), JTAG (IEEE 1149.1) |
| Embedded Array Blocks (EABs) | โ | Yes (dual-port RAM/ROM, up to 16-bit wide) |
| MultiVolt I/O Support | โ | Yes |
| LVDS Support | โ | True-LVDS (enhanced "E" variant feature) |
| Moisture Sensitivity Level (MSL) | โ | 3 (168 Hours) |
| Operating Temperature (Commercial) | โ | 0 ยฐC to 85 ยฐC |