EP20K200FC484-3AA vs EP20K200FC484-2X Comparison
Detailed side-by-side comparison of EP20K200FC484-3AA by Intel and EP20K200FC484-2X by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K200FC484-3AA
EP20K200FC484-3AA - APEX-20K FPGA 200K Gates 484-BGA | Intel
EP20K200FC484-3AA ObsoleteAltera
EP20K200FC484-2X
EP20K200FC484-2X - 200K Gates APEX 20K FPGA, 484-FBGA | Intel / Altera
EP20K200FC484-2X ObsoleteSpecification Comparison
| Parameter | EP20K200FC484-3AA | EP20K200FC484-2X |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $171.00 | $95.00 |
| Family | APEX-20K | APEX 20K |
| Logic Elements | 8320 | β |
| Number of LABs/CLBs | 832 | β |
| Total RAM Bits | 106496 | β |
| Number of I/O Pins | 382 | β |
| Maximum Gates | 526000 | β |
| Supply Voltage | 2.375 V to 2.625 V | β |
| Speed Grade | -3 | -2 (with LVDS support, "X" suffix) |
| Package Type | 484-BBGA (FineLine BGA) | β |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | 0 Β°C to 85 Β°C (commercial) |
| Operating Junction Temperature | [DATA_NEEDED: junction temperature range] | β |
| Configuration Interface | JTAG (IEEE 1149.1) / Serial | β |
| Process Technology | CMOS | 0.22 Β΅m CMOS |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Lead Free | [DATA_NEEDED: lead-free status] | β |
| Series | β | EP20K200 |
| Device Type | β | FPGA (Field Programmable Gate Array) |
| Maximum Logic Elements | β | 8,320 cells |
| Typical System Gates | β | 200,000 |
| Embedded Memory (EAB) | β | 106,496 bits |
| Maximum User I/O | β | 382 |
| Number of Logic Elements | β | 8,320 |
| Propagation Delay | β | 3.0 ns |
| Maximum Internal Frequency | β | 200 MHz |
| Core Supply Voltage | β | 2.5 V |
| Package | β | 484-pin FBGA (FineLine BGA), 1.0 mm pitch |
| Programmable I/O Standards | β | 1.8 V, 2.5 V, 3.3 V, LVTTL, LVCMOS, LVDS |
| JTAG Support | β | IEEE 1149.1 Boundary-Scan |