EP20K200RC208-1 vs EP20K200RC208-1X Comparison
Detailed side-by-side comparison of EP20K200RC208-1 by Intel and EP20K200RC208-1X by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K200RC208-1 - APEX 20K 200K Gates FPGA, 208-Pin RQFP | Intel / Altera
EP20K200RC208-1 β Last Time BuySpecification Comparison
| Parameter | EP20K200RC208-1 | EP20K200RC208-1X |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Last_time_buy | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $78.00 | $35.80 |
| Family | APEX-20K | APEX-20KE |
| Series | APEX 20K (200K gates) | β |
| System Gates | 200,000 | β |
| Logic Elements / Cells | 8,320 | β |
| Embedded Memory (bits) | 106,496 | β |
| Maximum User I/O | 144 | β |
| Number of PLLs | 4 | β |
| Process Technology | 0.22 Β΅m CMOS | 0.18 Β΅m CMOS |
| Core Supply Voltage | 2.5 V | β |
| I/O Standard Support | LVTTL, LVCMOS, 2.5 V/3.3 V PCI, 1.8 V LVDS | β |
| Maximum Internal Frequency | 250 MHz | β |
| Package | 208-BFQFP (RQFP) with Exposed Pad, 28Γ28 mm | 208-pin PQFP / RQFP (28x28 mm), 0.5 mm pitch |
| Mounting Type | Surface Mount | Surface Mount (gull-wing leads) |
| Configuration Interface | Passive Serial, Passive Parallel, JTAG (IEEE 1149.1) | IEEE 1149.1 JTAG, serial, passive parallel (PPA), EPC configuration devices |
| Operating Temperature | Industrial range | 0 Β°C to +85 Β°C (commercial) |
| RoHS Status | unknown | Compliant (lead-free PQFP package) |
| MSL Level | [DATA_NEEDED: MSL Level] | β |
| Logic Elements | β | 8,320 cells |
| Typical Gate Count | β | 200,000 gates |
| Embedded RAM Bits | β | 106,496 bits |
| Embedded RAM Blocks (ESBs) | β | 4 lanes / 52 ESBs |
| Maximum User I/O Pins | β | 144 (PQFP-208 variant) |
| Core Voltage | β | 1.8 V (Β±5%) |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI, SSTL-2/3, LVDS, GTL+ |
| Speed Grade | β | -1X (1.8 V core, PQFP-208 pinout) |
| MultiCore Architecture | β | LUT logic + product-term logic + embedded memory |
| PLL Count | β | 4 enhanced PLLs (with programmable phase shift) |
| Moisture Sensitivity Level | β | MSL 3 (per JEDEC J-STD-020, applicable to PQFP) |