EP20K200RC208-3N vs EP20K200RC208-2 Comparison

Detailed side-by-side comparison of EP20K200RC208-3N by Altera and EP20K200RC208-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K200RC208-3N EP20K200RC208-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $39.00 $79.67
Family APEX-20K APEX-20K MultiCore FPGA
Series APEX 20K APEX-20K
Logic Elements 8320 cells β€”
System Gates 200,000 200,000 (typical)
Embedded Memory 106,496 bits β€”
Maximum Operating Frequency 167 MHz β€”
User I/O Pins 144 β€”
Dedicated Inputs 4 β€”
Process Technology 0.22 um CMOS [DATA_NEEDED: process node]
Core Supply Voltage 2.5 V β€”
I/O Standard Support LVDS, 1.8V APEX-20KE family β€”
Package Type 208-RQFP / BFQFP with exposed pad β€”
Terminal Pitch 0.5 mm β€”
Operating Temperature Range 0C to +85C (industrial) β€”
Propagation Delay 3.6 ns β€”
Architecture MultiCore (LUT + product-term + embedded memory) β€”
Mounting Type Surface Mount Surface Mount
Logic Elements (LEs) β€” 8320
Embedded Memory (bits) β€” 106,496
Maximum User I/O β€” 144
Package β€” 208-BQFP / 208-RQFP with Exposed Pad
Pin Count β€” 208
Speed Grade β€” -2 (mid-speed, industrial)
Operating Temperature β€” -40C to +85C (industrial)
Supply Voltage (Core) β€” [DATA_NEEDED: core VCC]
Supply Voltage (I/O) β€” 3.3 V (multi-standard I/O)
Configuration Interface β€” JTAG (IEEE 1149.1) + Altera legacy scheme
MSL Level β€” [DATA_NEEDED: MSL rating]
RoHS Status β€” [DATA_NEEDED: RoHS compliance]
Lead-Free β€” [DATA_NEEDED: lead-free status]

Datasheets & Resources

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