EP20K400CB652C7N vs EP20K400CB652I7 Comparison
Detailed side-by-side comparison of EP20K400CB652C7N by Intel and EP20K400CB652I7 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EP20K400CB652C7N
EP20K400CB652C7N - 400K-Gate APEX 20KC FPGA | Intel (Altera)
EP20K400CB652C7N ObsoleteAltera
EP20K400CB652I7
EP20K400CB652I7 - 400K Gate APEX 20KC FPGA | Altera | BGA-652
EP20K400CB652I7 ObsoleteSpecification Comparison
| Parameter | EP20K400CB652C7N | EP20K400CB652I7 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $158.00 | $149.50 |
| Family | APEX 20KC | APEX 20KC |
| Device Series | EP20K400 | β |
| System Gates | 400,000 | β |
| Logic Elements / Cells | 16,640 | β |
| User I/Os | 502 | β |
| Package | 652-ball PBGA (BGA-652) | BGA-652 (652-ball) |
| Logic Family | CMOS (SRAM-based) | β |
| Process Technology | 0.15-um all-layer copper | 0.15 Β΅m CMOS |
| Core Voltage (VCCINT) | 1.8 V | β |
| I/O Voltage (VCCIO) | 2.5 V | β |
| Supply Voltage (general) | 2.5 V | β |
| Pin-to-Pin Propagation Delay | 1.48 ns | β |
| Internal Propagation Delay | 2.5 ns | β |
| Maximum Operating Frequency | 375.94 MHz | 375.94 MHz |
| Operating Temperature | 0 C to 85 C (commercial) | β |
| Mounting Type | Surface Mount | β |
| Architecture | MultiCore (LUT + embedded memory) | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-compliant (JESD-609 e0, contains lead) |
| Device Family | β | Field-Programmable Gate Array (FPGA) |
| Typical Gates | β | 400,000 |
| Logic Elements (LEs) | β | 16,640 |
| Core Supply Voltage | β | 1.8 V |
| I/O Supply Voltage | β | 1.8 V / 3.3 V |
| Package Code (JESD-30) | β | S-PBGA-B652 |
| Terminal Form | β | Ball |
| Package Shape | β | Square |
| Maximum User I/O Pins | β | [DATA_NEEDED: max user I/O] |
| Embedded Memory | β | Embedded System Blocks (ESB) - dual-port RAM / FIFO / CAM |
| Configuration Method | β | SRAM + JTAG (ISP) |
| Speed Grade | β | 7 |
| Temperature Grade | β | Industrial (-40 Β°C to +100 Β°C) |
| Manufacturer Status | β | Obsolete (Intel/Altera legacy FPGA) |