EP20K400CB652C9 vs EP20K400CF672C-8 Comparison

Detailed side-by-side comparison of EP20K400CB652C9 by Intel and EP20K400CF672C-8 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400CB652C9 EP20K400CF672C-8
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $89.20 $95.00
Family APEX 20KC APEX 20K
Logic Elements 16640 16,640
Gate Count 400000 β€”
Maximum Operating Frequency 250 MHz β€”
User I/Os 488 β€”
Process Technology 0.15 Β΅m CMOS 0.15 Β΅m all-layer copper CMOS
Core Supply Voltage 1.8 V β€”
Propagation Delay 2.5 ns β€”
Operating Temperature 0 Β°C to +85 Β°C (Commercial) β€”
Package BGA-652, 45 Γ— 45 mm, 1.27 mm pitch β€”
Mounting Type Surface Mount Surface Mount (BGA)
Number of PLLs 4 β€”
Embedded Memory Blocks MultiCore ESBs (Embedded System Blocks) β€”
I/O Standard Support LVTTL, LVCMOS, PCI, HSTL, SSTL (MultiVolt I/O) β€”
RoHS Status [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS compliance]
Typical Gates β€” 400,000
Macros β€” 1,664
Maximum User I/O β€” 488
Number of I/O Banks β€” [DATA_NEEDED: number of I/O banks]
Package Type β€” PBGA-672 (FineLine BGA, 27 x 27 mm, 1.0 mm pitch)
Core Voltage (VCCINT) β€” 1.8 V nominal (1.71 V to 1.89 V)
I/O Voltage (VCCIO) β€” [DATA_NEEDED: VCCIO options]
Pin-to-Pin Delay (tPD) β€” 1.78 ns (speed grade -8)
Speed Grade β€” -8
Temperature Grade (C) β€” Commercial, 0 Β°C to 85 Β°C
Embedded Memory Type β€” ESB (RAM / ROM / CAM)
Configuration Interface β€” JTAG (IEEE 1149.1), Passive Serial, Passive Parallel
JTAG Support β€” Yes (IEEE 1149.1 boundary-scan)
MSL Level β€” [DATA_NEEDED: MSL level]

Datasheets & Resources

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