EP20K400CF672C8ES vs EP20K200CF672C8ES Comparison

Detailed side-by-side comparison of EP20K400CF672C8ES by Altera and EP20K200CF672C8ES by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400CF672C8ES EP20K200CF672C8ES
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $158.40 $158.00
Family APEX 20KC APEX 20K
Series EP20K400 β€”
Logic Cells / Macros 16,640 β€”
System Gates (typical) 400,000 β€”
System Gates (maximum) 212,992 [DATA_NEEDED: confirm datasheet interpretation] β€”
Maximum User I/O 488 (per Globalspec) / 484 (per Microchip USA) [DATA_NEEDED: confirm canonical value] β€”
Bidirectional I/O 484 β€”
Propagation Delay 2.5 ns β€”
Maximum Internal Frequency 301.21 MHz β€”
Process Technology 0.15 Β΅m CMOS [DATA_NEEDED: process node]
Nominal Supply Voltage 1.8 V β€”
Supply Voltage Range 1.71 V to 1.89 V β€”
Operating Temperature 0Β°C to 85Β°C (Commercial) 0C to +85C (commercial)
Package 672-BGA FineLine (FC-FBGA / S-PBGA-B672) 672-ball FineLine BGA
Logic Family CMOS β€”
Architecture MultiCoreβ„’ (LUT + Embedded System Block) β€”
Programming Method JTAG / in-system via configuration memory β€”
RoHS Status [DATA_NEEDED: not stated in verified data] [DATA_NEEDED: rohs status]
Maximum Logic Elements β€” 8,320
Typical Gates β€” 200,000 system gates
Maximum User I/O Pins β€” 1,064
Embedded RAM Bits β€” 212,992 bits
Speed Grade β€” C8 (8 ns pin-to-pin)
Core Voltage β€” 1.8 V
Configuration Method β€” SRAM, requires external PROM
Mounting Type β€” Surface Mount (BGA)
Status Suffix β€” ES (Engineering Sample)
I/O Standards β€” LVTTL, LVCMOS, PCI, GTL+, SSTL, HSTL
Logic Element Architecture β€” 4-input LUT with dedicated carry/cascade
Embedded Memory Type β€” RAM / ROM / CAM blocks

Datasheets & Resources

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