EP20K400CF672C8ES vs EP20K400CF672C7ES Comparison

Detailed side-by-side comparison of EP20K400CF672C8ES by Altera and EP20K400CF672C7ES by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400CF672C8ES EP20K400CF672C7ES
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $158.40 $152.00
Family APEX 20KC APEX 20KC
Series EP20K400 EP20K400
Logic Cells / Macros 16,640 β€”
System Gates (typical) 400,000 β€”
System Gates (maximum) 212,992 [DATA_NEEDED: confirm datasheet interpretation] β€”
Maximum User I/O 488 (per Globalspec) / 484 (per Microchip USA) [DATA_NEEDED: confirm canonical value] 488
Bidirectional I/O 484 β€”
Propagation Delay 2.5 ns 1.4 ns
Maximum Internal Frequency 301.21 MHz β€”
Process Technology 0.15 Β΅m CMOS 0.18 um CMOS
Nominal Supply Voltage 1.8 V β€”
Supply Voltage Range 1.71 V to 1.89 V β€”
Operating Temperature 0Β°C to 85Β°C (Commercial) 0C to +85C (commercial)
Package 672-BGA FineLine (FC-FBGA / S-PBGA-B672) β€”
Logic Family CMOS β€”
Architecture MultiCoreβ„’ (LUT + Embedded System Block) β€”
Programming Method JTAG / in-system via configuration memory β€”
RoHS Status [DATA_NEEDED: not stated in verified data] [DATA_NEEDED: RoHS compliance]
Device Type β€” Loadable PLD / FPGA
Logic Elements (Cells) β€” 16,640
System Gates β€” 400,000
Embedded Memory (Bits) β€” 212,992
Total RAM Bits β€” 212,992
I/O Lines β€” 484
Input Lines β€” 488
Number of PLLs β€” 4
Maximum Internal Clock Frequency β€” 375.94 MHz
Core Voltage β€” 1.8 V
MultiVolt I/O β€” 1.5 V / 1.8 V / 2.5 V / 3.3 V
Speed Grade β€” C7 (commercial, -7)
Package Type β€” 672-ball FineLine BGA
Package Code β€” FC-FBGA-B672
Ball Pitch β€” 1.000 mm
Mounting Type β€” Surface Mount

Datasheets & Resources

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