EP20K400CF672C9 vs EP20K400CF672C8AA Comparison
Detailed side-by-side comparison of EP20K400CF672C9 by Altera and EP20K400CF672C8AA by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K400CF672C9 - APEX-20K 400K Gates FPGA, 672-FBGA | Intel / Altera
EP20K400CF672C9 ObsoleteSpecification Comparison
| Parameter | EP20K400CF672C9 | EP20K400CF672C8AA |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $390.40 | $145.00 |
| Series | APEX-20KC | β |
| Logic Family / Architecture | MultiCore (LUT + ESB) | β |
| System Gates | 400,000 | β |
| Logic Cells / Elements | 16,640 | β |
| Maximum User I/Os | 488 | β |
| Package / Case | 672-BBGA, FCBGA | β |
| Supplier Device Package | 672-FBGA (27x27 mm) | β |
| Ball Pitch | 1.0 mm | β |
| Core Supply Voltage | 2.5 V | β |
| I/O Supply Voltage | [DATA_NEEDED: I/O VCCIO range] | β |
| Process Technology | 0.22 um CMOS | β |
| Internal Maximum Frequency | 368 MHz | β |
| Propagation Delay | 2.5 ns | [DATA_NEEDED: typical propagation delay] |
| Operating Temperature | 0C to +85C (Commercial) | 0 C to 85 C (Commercial) |
| Embedded Memory | Embedded System Blocks (ESB) | β |
| Configuration Method | Serial / Parallel PROM | β |
| RoHS Status | RoHS non-compliant (legacy) | [DATA_NEEDED: RoHS status] |
| Mounting Type | Surface Mount | Surface Mount |
| Family | β | APEX 20K |
| Number of Logic Elements/Cells | β | 16640 |
| Number of Logic Units (LEs) | β | [DATA_NEEDED: number of LUs] |
| Embedded System Blocks (ESBs) | β | 212 |
| On-chip RAM Bits | β | [DATA_NEEDED: total embedded memory bits] |
| Number of User I/O Pins | β | 488 |
| Package Type | β | 672-ball Fine-Pitch BGA (FBGA) |
| Number of Pins/Balls | β | 672 |
| Supply Voltage (Core) | β | 2.5 V |
| I/O Standards Supported | β | LVTTL, LVCMOS, PCI, SSTL, HSTL (multi-voltage I/O) |
| Packaging | β | Tray |
| Moisture Sensitivity Level (MSL) | β | 3 (168 Hours) |
| Configuration Interface | β | JTAG (IEEE 1149.1), passive serial, passive parallel asynchronous |