EP20K400FC672-3 vs EP20K400FC672-2 Comparison
Detailed side-by-side comparison of EP20K400FC672-3 by Altera and EP20K400FC672-2 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K400FC672-3 | EP20K400FC672-2 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $138.00 | $171.00 |
| Family | APEX 20K | APEX-20K (MultiCore) |
| Device Logic Elements | 16,640 cells | β |
| Typical Gate Count | 400,000 system gates | β |
| Maximum User I/Os | 502 | β |
| Propagation Delay | 2.5 ns | β |
| Internal Performance | 167 MHz | β |
| Process Technology | 0.22 Β΅m CMOS | 0.22 Β΅m CMOS |
| Core Supply Voltage | 2.5 V | 2.5 V |
| Logic Family | CMOS, SRAM-based | β |
| Package | 672-pin FC-FBGA | 672-ball FC-FBGA (BBGA) |
| Package Code | BGA | β |
| Number of Terminals | 672 | β |
| Terminal Form | Ball (BGA) | β |
| Speed Grade | -3 (commercial fastest) | -2 |
| Operating Temperature | 0 Β°C to 85 Β°C | 0Β°C to +85Β°C (Commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| Architecture | MultiCore (LUT + Embedded System Blocks) | β |
| Programming Method | SRAM, JTAG (ByteBlaster) | β |
| Lifecycle Status | Obsolete / Legacy | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Series | β | APEX-20K |
| Logic Elements / Cells | β | 16640 |
| Number of Macrocells | β | 1664 |
| Number of Logic Blocks | β | [DATA_NEEDED: LAB count] |
| Number of Gates | β | 400000 |
| Embedded Memory (Bits) | β | 212992 |
| Maximum User I/O | β | 502 |
| Number of I/O Banks | β | [DATA_NEEDED: I/O bank count] |
| Operating Frequency (Max) | β | 200 MHz |
| Propagation Delay (tpd) | β | 2.5 ns |