EP20K400FC672-3 vs EP20K400FC672-3X Comparison

Detailed side-by-side comparison of EP20K400FC672-3 by Altera and EP20K400FC672-3X by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EP20K400FC672-3

EP20K400FC672-3 - APEX 20K 400K FPGA, 672-FBGA | Altera

EP20K400FC672-3 Obsolete
Altera
EP20K400FC672-3X

EP20K400FC672-3X - APEX 20K 400K Gates FPGA, 672-BGA | Altera

EP20K400FC672-3X ⚠ Last Time Buy

Specification Comparison

Parameter EP20K400FC672-3 EP20K400FC672-3X
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Last_time_buy
Stock Status In Stock In Stock
Unit Price (USD) $138.00 $152.40
Family APEX 20K β€”
Device Logic Elements 16,640 cells β€”
Typical Gate Count 400,000 system gates β€”
Maximum User I/Os 502 β€”
Propagation Delay 2.5 ns β€”
Internal Performance 167 MHz β€”
Process Technology 0.22 Β΅m CMOS β€”
Core Supply Voltage 2.5 V 2.5 V
Logic Family CMOS, SRAM-based APEX 20K
Package 672-pin FC-FBGA 672-ball FC-FBGA (Fine-pitch Chip-Scale BGA)
Package Code BGA β€”
Number of Terminals 672 β€”
Terminal Form Ball (BGA) β€”
Speed Grade -3 (commercial fastest) -3X
Operating Temperature 0 Β°C to 85 Β°C 0 Β°C to 85 Β°C (commercial)
Mounting Type Surface Mount Surface Mount (BGA)
Architecture MultiCore (LUT + Embedded System Blocks) MultiCore (LUT + embedded CAM/RAM)
Programming Method SRAM, JTAG (ByteBlaster) β€”
Lifecycle Status Obsolete / Legacy β€”
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
Device Sub-family β€” EP20K400
Technology β€” CMOS 0.22 Β΅m
Number of Gates β€” 400,000 (typical)
Logic Cells β€” 16,640
Macros / Macrocells β€” 1664
User I/Os β€” 502
Dedicated I/O Lines β€” 496
Maximum Clock Frequency β€” 181.82 MHz
Typical Propagation Delay β€” 2.07 ns
Programming Interface β€” JTAG (IEEE 1149.1) / ByteBlaster / MasterBlaster

Datasheets & Resources

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