EP20K400FC672-3 vs EP20K400FI672-2 Comparison

Detailed side-by-side comparison of EP20K400FC672-3 by Altera and EP20K400FI672-2 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400FC672-3 EP20K400FI672-2
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $138.00 $92.40
Family APEX 20K APEX-20K
Device Logic Elements 16,640 cells β€”
Typical Gate Count 400,000 system gates β€”
Maximum User I/Os 502 β€”
Propagation Delay 2.5 ns 2.5 ns
Internal Performance 167 MHz β€”
Process Technology 0.22 Β΅m CMOS 0.22 Β΅m CMOS
Core Supply Voltage 2.5 V 2.5 V
Logic Family CMOS, SRAM-based β€”
Package 672-pin FC-FBGA β€”
Package Code BGA β€”
Number of Terminals 672 β€”
Terminal Form Ball (BGA) β€”
Speed Grade -3 (commercial fastest) β€”
Operating Temperature 0 Β°C to 85 Β°C 0 Β°C to +85 Β°C (Commercial)
Mounting Type Surface Mount Surface Mount (BGA)
Architecture MultiCore (LUT + Embedded System Blocks) β€”
Programming Method SRAM, JTAG (ByteBlaster) β€”
Lifecycle Status Obsolete / Legacy β€”
RoHS Status [DATA_NEEDED: RoHS status] Lead-free / RoHS Compliant
Logic Elements β€” 16640
Maximum Gates β€” 400,000 gates
User I/Os β€” 502
Embedded Memory Bits β€” 212992
Number of Macros β€” 1664
Maximum Internal Frequency β€” 200 MHz
Package Type β€” 672-pin Fine-pitch Ball Grid Array (FBGA/FCBGA)
PLLs (Phase-Locked Loops) β€” 4
Configuration Modes β€” JTAG, Passive Serial, Passive Parallel

Datasheets & Resources

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