EP20K400FC672-3 vs EP20K400FI672-3V Comparison
Detailed side-by-side comparison of EP20K400FC672-3 by Altera and EP20K400FI672-3V by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K400FC672-3
EP20K400FC672-3 - APEX 20K 400K FPGA, 672-FBGA | Altera
EP20K400FC672-3 ObsoleteIntel
EP20K400FI672-3V
EP20K400FI672-3V - APEX 20K 400K-Gate FPGA 672-BGA | Intel
EP20K400FI672-3V ObsoleteSpecification Comparison
| Parameter | EP20K400FC672-3 | EP20K400FI672-3V |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $138.00 | $285.00 |
| Family | APEX 20K | APEX 20K (EP20K400) |
| Device Logic Elements | 16,640 cells | β |
| Typical Gate Count | 400,000 system gates | β |
| Maximum User I/Os | 502 | β |
| Propagation Delay | 2.5 ns | β |
| Internal Performance | 167 MHz | β |
| Process Technology | 0.22 Β΅m CMOS | 0.18 Β΅m CMOS, 4 metal layers |
| Core Supply Voltage | 2.5 V | β |
| Logic Family | CMOS, SRAM-based | β |
| Package | 672-pin FC-FBGA | 672-ball FineLine BGA (BBGA), 1.0 mm pitch |
| Package Code | BGA | β |
| Number of Terminals | 672 | β |
| Terminal Form | Ball (BGA) | β |
| Speed Grade | -3 (commercial fastest) | -3 (faster) |
| Operating Temperature | 0 Β°C to 85 Β°C | -40 Β°C to +85 Β°C (industrial) |
| Mounting Type | Surface Mount | Surface Mount |
| Architecture | MultiCore (LUT + Embedded System Blocks) | β |
| Programming Method | SRAM, JTAG (ByteBlaster) | β |
| Lifecycle Status | Obsolete / Legacy | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Logic Elements | β | 16,640 |
| Maximum Gates | β | 400,000 |
| Typical Gates | β | [DATA_NEEDED: typical gates value] |
| Embedded Memory (bits) | β | 212,992 |
| Maximum User I/O | β | 502 |
| Dedicated Inputs | β | 6 |
| Total User I/O + Dedicated Inputs | β | 496 + 6 (variant dependent) |
| Maximum Clock Frequency | β | 714.2 MHz |
| Core Voltage (VCCINT) | β | 2.5 V nominal (2.375 V to 2.625 V) |
| Programmable via JTAG | β | Yes (IEEE 1149.1) |
| Supported I/O Standards | β | LVCMOS, LVTTL, SSTL, GTL+, HSTL |
| Configuration Modes | β | JTAG, passive serial, passive parallel |
| MSL Level | β | [DATA_NEEDED: MSL rating] |