EP20K400FC672-3V vs EP20K400FI672-3V Comparison
Detailed side-by-side comparison of EP20K400FC672-3V by Altera and EP20K400FI672-3V by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K400FC672-3V | EP20K400FI672-3V |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $152.00 | $285.00 |
| Family | APEX 20KC | APEX 20K (EP20K400) |
| Series | APEX-20KC | β |
| Device Type | FPGA (Field Programmable Gate Array) | β |
| Logic Elements / Cells | 16640 | β |
| System Gates | 400000 | β |
| Total RAM Bits | 212992 | β |
| Number of I/O | 502 | β |
| Number of LABs/CLBs | 1664 | β |
| Number of Logic Elements | 16640 | β |
| Supply Voltage (Core) | 1.71 V to 1.89 V | β |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | -40 Β°C to +85 Β°C (industrial) |
| Package / Case | 672-BBGA, FCBGA | β |
| Supplier Device Package | 672-FBGA (27x27) | β |
| Process Technology | 0.22 Β΅m | 0.18 Β΅m CMOS, 4 metal layers |
| Maximum Internal Frequency | 167 MHz (typical) | β |
| Pin-to-Pin Delay | 3.6 ns | β |
| Speed Grade | -3 | -3 (faster) |
| Programmability Type | In-system (JTAG IEEE 1149.1) | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Logic Elements | β | 16,640 |
| Maximum Gates | β | 400,000 |
| Typical Gates | β | [DATA_NEEDED: typical gates value] |
| Embedded Memory (bits) | β | 212,992 |
| Maximum User I/O | β | 502 |
| Dedicated Inputs | β | 6 |
| Total User I/O + Dedicated Inputs | β | 496 + 6 (variant dependent) |
| Maximum Clock Frequency | β | 714.2 MHz |
| Core Voltage (VCCINT) | β | 2.5 V nominal (2.375 V to 2.625 V) |
| Package | β | 672-ball FineLine BGA (BBGA), 1.0 mm pitch |
| Programmable via JTAG | β | Yes (IEEE 1149.1) |
| Supported I/O Standards | β | LVCMOS, LVTTL, SSTL, GTL+, HSTL |
| Configuration Modes | β | JTAG, passive serial, passive parallel |
| MSL Level | β | [DATA_NEEDED: MSL rating] |