EP20K400FI672-2 vs EP20K400FI672-2N Comparison

Detailed side-by-side comparison of EP20K400FI672-2 by Altera and EP20K400FI672-2N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400FI672-2 EP20K400FI672-2N
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Nrnd
Stock Status In Stock In Stock
Unit Price (USD) $92.40 $188.75
Family APEX-20K APEX 20K
Logic Elements 16640 β€”
Maximum Gates 400,000 gates β€”
User I/Os 502 β€”
Embedded Memory Bits 212992 212,992 bits
Number of Macros 1664 β€”
Process Technology 0.22 Β΅m CMOS 0.22 Β΅m CMOS
Core Supply Voltage 2.5 V β€”
Maximum Internal Frequency 200 MHz β€”
Propagation Delay 2.5 ns 3.1 ns
Operating Temperature 0 Β°C to +85 Β°C (Commercial) Commercial (0 Β°C to +70 Β°C) [DATA_NEEDED: industrial variant]
Package Type 672-pin Fine-pitch Ball Grid Array (FBGA/FCBGA) β€”
PLLs (Phase-Locked Loops) 4 β€”
Configuration Modes JTAG, Passive Serial, Passive Parallel PS, PPS, PPA, JTAG
RoHS Status Lead-free / RoHS Compliant Compliant (lead-free)
Mounting Type Surface Mount (BGA) Surface Mount
Typical Gates β€” 400,000
Logic Elements / Cells β€” 16,640
Maximum User I/O β€” 488
Embedded Array Blocks (EABs) β€” [DATA_NEEDED: EAB count per family datasheet]
Core Voltage β€” 2.5 V
Maximum Frequency β€” 200 MHz
Package β€” 672-pin FC-FBGA (Flip-Chip Fine-pitch BGA)
Package Body Size β€” 27 x 27 mm
Terminal Pitch β€” 1.0 mm
Speed Grade β€” -2
Moisture Sensitivity Level (MSL) β€” 3
Peak Reflow Temperature β€” 220 Β°C
Supported I/O Standards β€” LVTTL, LVCMOS, SSTL, HSTL

Datasheets & Resources

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