EP20K400FI672-2 vs EP20K400FI672-2X Comparison
Detailed side-by-side comparison of EP20K400FI672-2 by Altera and EP20K400FI672-2X by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K400FI672-2 - 400K Gates APEX-20K FPGA, 502 I/O, 672-FBGA | Altera
EP20K400FI672-2 Obsolete
Specification Comparison
| Parameter | EP20K400FI672-2 | EP20K400FI672-2X |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $92.40 | $171.00 |
| Family | APEX-20K | APEX 20K |
| Logic Elements | 16640 | 16,640 |
| Maximum Gates | 400,000 gates | β |
| User I/Os | 502 | β |
| Embedded Memory Bits | 212992 | β |
| Number of Macros | 1664 | β |
| Process Technology | 0.22 Β΅m CMOS | 0.18 um CMOS, 6-metal |
| Core Supply Voltage | 2.5 V | β |
| Maximum Internal Frequency | 200 MHz | β |
| Propagation Delay | 2.5 ns | β |
| Operating Temperature | 0 Β°C to +85 Β°C (Commercial) | -40C to +85C (industrial) |
| Package Type | 672-pin Fine-pitch Ball Grid Array (FBGA/FCBGA) | β |
| PLLs (Phase-Locked Loops) | 4 | β |
| Configuration Modes | JTAG, Passive Serial, Passive Parallel | β |
| RoHS Status | Lead-free / RoHS Compliant | [DATA_NEEDED: RoHS compliance] |
| Mounting Type | Surface Mount (BGA) | β |
| Typical Gates | β | 400,000 system gates |
| Embedded Memory | β | 212,992 bits |
| User I/O Pins | β | 496 |
| Package | β | 672-ball BGA (FI672) |
| Package Code | β | BGA |
| Terminal Form | β | Ball |
| No. of Terminals | β | 672 |
| Package Shape | β | Square |
| Speed Grade | β | -2X |
| Core Voltage | β | 1.8 V |
| I/O Voltage Support | β | 1.8V / 2.5V / 3.3V / 5V (MultiVolt) |
| Configuration Method | β | SRAM (serial EPROM or JTAG) |
| JTAG Support | β | Yes (IEEE 1149.1) |