EP20K400FI672-2 vs EP20K400FI672-3 Comparison
Detailed side-by-side comparison of EP20K400FI672-2 by Altera and EP20K400FI672-3 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EP20K400FI672-2 - 400K Gates APEX-20K FPGA, 502 I/O, 672-FBGA | Altera
EP20K400FI672-2 ObsoleteSpecification Comparison
| Parameter | EP20K400FI672-2 | EP20K400FI672-3 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $92.40 | $195.00 |
| Family | APEX-20K | APEX 20K |
| Logic Elements | 16640 | 16640 |
| Maximum Gates | 400,000 gates | β |
| User I/Os | 502 | β |
| Embedded Memory Bits | 212992 | β |
| Number of Macros | 1664 | β |
| Process Technology | 0.22 Β΅m CMOS | CMOS |
| Core Supply Voltage | 2.5 V | β |
| Maximum Internal Frequency | 200 MHz | β |
| Propagation Delay | 2.5 ns | 3.6 ns |
| Operating Temperature | 0 Β°C to +85 Β°C (Commercial) | [DATA_NEEDED: operating temperature range] |
| Package Type | 672-pin Fine-pitch Ball Grid Array (FBGA/FCBGA) | PBGA (Plastic BGA) |
| PLLs (Phase-Locked Loops) | 4 | β |
| Configuration Modes | JTAG, Passive Serial, Passive Parallel | β |
| RoHS Status | Lead-free / RoHS Compliant | β |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| Series | β | EP20K400 |
| Total Gates | β | up to 400000 |
| Embedded RAM | β | 212992 bits |
| Maximum User I/O | β | 502 |
| Dedicated Inputs | β | 6 |
| Maximum Clock Frequency | β | 833 MHz |
| Supply Voltage (Nominal) | β | 2.5 V |
| Supply Voltage Range | β | 2.375 V to 2.625 V |
| Package Code | β | S-PBGA-B672 |
| Terminal Count | β | 672 |
| Terminal Pitch | β | 1.000 mm |
| Package Shape | β | Square BGA |
| Configuration Interface | β | JTAG (IEEE 1149.1) |
| MSL Level | β | 3 |
| Peak Reflow Temperature | β | 220 C |