EP20K400FI672-3 vs EP20K400FI672-3V Comparison

Detailed side-by-side comparison of EP20K400FI672-3 by Altera and EP20K400FI672-3V by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EP20K400FI672-3 EP20K400FI672-3V
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $195.00 $285.00
Family APEX 20K APEX 20K (EP20K400)
Series EP20K400 β€”
Logic Elements 16640 16,640
Total Gates up to 400000 β€”
Embedded RAM 212992 bits β€”
Maximum User I/O 502 502
Dedicated Inputs 6 6
Propagation Delay 3.6 ns β€”
Maximum Clock Frequency 833 MHz 714.2 MHz
Supply Voltage (Nominal) 2.5 V β€”
Supply Voltage Range 2.375 V to 2.625 V β€”
Process Technology CMOS 0.18 Β΅m CMOS, 4 metal layers
Package Type PBGA (Plastic BGA) β€”
Package Code S-PBGA-B672 β€”
Terminal Count 672 β€”
Terminal Pitch 1.000 mm β€”
Package Shape Square BGA β€”
Mounting Type Surface Mount Surface Mount
Configuration Interface JTAG (IEEE 1149.1) β€”
Operating Temperature [DATA_NEEDED: operating temperature range] -40 Β°C to +85 Β°C (industrial)
MSL Level 3 [DATA_NEEDED: MSL rating]
Peak Reflow Temperature 220 C β€”
Maximum Gates β€” 400,000
Typical Gates β€” [DATA_NEEDED: typical gates value]
Embedded Memory (bits) β€” 212,992
Total User I/O + Dedicated Inputs β€” 496 + 6 (variant dependent)
Speed Grade β€” -3 (faster)
Core Voltage (VCCINT) β€” 2.5 V nominal (2.375 V to 2.625 V)
Package β€” 672-ball FineLine BGA (BBGA), 1.0 mm pitch
Programmable via JTAG β€” Yes (IEEE 1149.1)
Supported I/O Standards β€” LVCMOS, LVTTL, SSTL, GTL+, HSTL
Configuration Modes β€” JTAG, passive serial, passive parallel
RoHS Status β€” [DATA_NEEDED: RoHS status]

Datasheets & Resources

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