EP20K400FI672-3V vs EP20K400FI672-3 Comparison
Detailed side-by-side comparison of EP20K400FI672-3V by Intel and EP20K400FI672-3 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP20K400FI672-3V | EP20K400FI672-3 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $285.00 | $195.00 |
| Family | APEX 20K (EP20K400) | APEX 20K |
| Logic Elements | 16,640 | 16640 |
| Maximum Gates | 400,000 | β |
| Typical Gates | [DATA_NEEDED: typical gates value] | β |
| Embedded Memory (bits) | 212,992 | β |
| Maximum User I/O | 502 | 502 |
| Dedicated Inputs | 6 | 6 |
| Total User I/O + Dedicated Inputs | 496 + 6 (variant dependent) | β |
| Maximum Clock Frequency | 714.2 MHz | 833 MHz |
| Speed Grade | -3 (faster) | β |
| Core Voltage (VCCINT) | 2.5 V nominal (2.375 V to 2.625 V) | β |
| Process Technology | 0.18 Β΅m CMOS, 4 metal layers | CMOS |
| Package | 672-ball FineLine BGA (BBGA), 1.0 mm pitch | β |
| Mounting Type | Surface Mount | Surface Mount |
| Programmable via JTAG | Yes (IEEE 1149.1) | β |
| Supported I/O Standards | LVCMOS, LVTTL, SSTL, GTL+, HSTL | β |
| Configuration Modes | JTAG, passive serial, passive parallel | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | β |
| Operating Temperature | -40 Β°C to +85 Β°C (industrial) | [DATA_NEEDED: operating temperature range] |
| MSL Level | [DATA_NEEDED: MSL rating] | 3 |
| Series | β | EP20K400 |
| Total Gates | β | up to 400000 |
| Embedded RAM | β | 212992 bits |
| Propagation Delay | β | 3.6 ns |
| Supply Voltage (Nominal) | β | 2.5 V |
| Supply Voltage Range | β | 2.375 V to 2.625 V |
| Package Type | β | PBGA (Plastic BGA) |
| Package Code | β | S-PBGA-B672 |
| Terminal Count | β | 672 |
| Terminal Pitch | β | 1.000 mm |
| Package Shape | β | Square BGA |
| Configuration Interface | β | JTAG (IEEE 1149.1) |
| Peak Reflow Temperature | β | 220 C |